target-arm: Move reset FPSID to ARMCPU

Move the reset FPSID to the ARMCPU struct, and set it in the
per-implementation instance init function. At reset we then
just copy the reset value into the CPUARMState field.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

3 files changed, 12 insertions, 8 deletions

diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 1b6b2be449..1db71d865a 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -63,6 +63,7 @@ typedef struct ARMCPU {
     /* Configuration values (set by the instance init function);
      * some of these might become properties eventually.
      */
+    uint32_t reset_fpsid;
 } ARMCPU;
 
 static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 9b68b70c23..bd3aeb107c 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -45,6 +45,8 @@ static void arm_cpu_reset(CPUState *c)
     env->cp15.c0_cpuid = id;
     env->cp15.c15_config_base_address = tmp;
 
+    env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid;
+
 #if defined(CONFIG_USER_ONLY)
     env->uncached_cpsr = ARM_CPU_MODE_USR;
     /* For user mode we must enable access to coprocessors */
@@ -166,6 +168,7 @@ static void arm926_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_V5);
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     cpu->env.cp15.c0_cpuid = 0x41069265;
+    cpu->reset_fpsid = 0x41011090;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -185,6 +188,7 @@ static void arm1026_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     set_feature(&cpu->env, ARM_FEATURE_AUXCR);
     cpu->env.cp15.c0_cpuid = 0x4106a262;
+    cpu->reset_fpsid = 0x410110a0;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -194,6 +198,7 @@ static void arm1136_r2_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_V6);
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     cpu->env.cp15.c0_cpuid = 0x4107b362;
+    cpu->reset_fpsid = 0x410120b4;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -204,6 +209,7 @@ static void arm1136_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_V6);
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     cpu->env.cp15.c0_cpuid = 0x4117b363;
+    cpu->reset_fpsid = 0x410120b4;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -214,6 +220,7 @@ static void arm1176_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     set_feature(&cpu->env, ARM_FEATURE_VAPA);
     cpu->env.cp15.c0_cpuid = 0x410fb767;
+    cpu->reset_fpsid = 0x410120b5;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -224,6 +231,7 @@ static void arm11mpcore_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_VFP);
     set_feature(&cpu->env, ARM_FEATURE_VAPA);
     cpu->env.cp15.c0_cpuid = 0x410fb022;
+    cpu->reset_fpsid = 0x410120b4;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -244,6 +252,7 @@ static void cortex_a8_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_NEON);
     set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
     cpu->env.cp15.c0_cpuid = 0x410fc080;
+    cpu->reset_fpsid = 0x410330c0;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -261,6 +270,7 @@ static void cortex_a9_initfn(Object *obj)
      */
     set_feature(&cpu->env, ARM_FEATURE_V7MP);
     cpu->env.cp15.c0_cpuid = 0x410fc090;
+    cpu->reset_fpsid = 0x41033090;
     arm_cpu_postconfig_init(cpu);
 }
 
@@ -276,6 +286,7 @@ static void cortex_a15_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_V7MP);
     set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
     cpu->env.cp15.c0_cpuid = 0x412fc0f1;
+    cpu->reset_fpsid = 0x410430f0;
     arm_cpu_postconfig_init(cpu);
 }
 
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4b881de2e0..f79921a6c3 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -48,7 +48,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
 {
     switch (id) {
     case ARM_CPUID_ARM926:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090;
         env->cp15.c0_cachetype = 0x1dd20d2;
         env->cp15.c1_sys = 0x00090078;
         break;
@@ -57,7 +56,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c1_sys = 0x00000078;
         break;
     case ARM_CPUID_ARM1026:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410110a0;
         env->cp15.c0_cachetype = 0x1dd20d2;
         env->cp15.c1_sys = 0x00090078;
         break;
@@ -72,7 +70,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
          * for 1136_r2 (in particular r0p2 does not actually implement most
          * of the ID registers).
          */
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b4;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x00000000;
         memcpy(env->cp15.c0_c1, arm1136_cp15_c0_c1, 8 * sizeof(uint32_t));
@@ -81,7 +78,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c1_sys = 0x00050078;
         break;
     case ARM_CPUID_ARM1176:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b5;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x00000000;
         memcpy(env->cp15.c0_c1, arm1176_cp15_c0_c1, 8 * sizeof(uint32_t));
@@ -90,7 +86,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c1_sys = 0x00050078;
         break;
     case ARM_CPUID_ARM11MPCORE:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b4;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x00000000;
         memcpy(env->cp15.c0_c1, mpcore_cp15_c0_c1, 8 * sizeof(uint32_t));
@@ -98,7 +93,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c0_cachetype = 0x1dd20d2;
         break;
     case ARM_CPUID_CORTEXA8:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410330c0;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x00011100;
         memcpy(env->cp15.c0_c1, cortexa8_cp15_c0_c1, 8 * sizeof(uint32_t));
@@ -111,7 +105,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c1_sys = 0x00c50078;
         break;
     case ARM_CPUID_CORTEXA9:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x41033090;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x01111111;
         memcpy(env->cp15.c0_c1, cortexa9_cp15_c0_c1, 8 * sizeof(uint32_t));
@@ -123,7 +116,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         env->cp15.c1_sys = 0x00c50078;
         break;
     case ARM_CPUID_CORTEXA15:
-        env->vfp.xregs[ARM_VFP_FPSID] = 0x410430f0;
         env->vfp.xregs[ARM_VFP_MVFR0] = 0x10110222;
         env->vfp.xregs[ARM_VFP_MVFR1] = 0x11111111;
         memcpy(env->cp15.c0_c1, cortexa15_cp15_c0_c1, 8 * sizeof(uint32_t));