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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2014-05-26 01:38:55 -0700
committerMichael Tokarev <mjt@tls.msk.ru>2014-06-10 19:39:34 +0400
commit3048ed6aac8bd7622e1f9c82ebe83f819b5d6b75 (patch)
treedb7c9ddace2e0bffaed795ab015f4da5238836d0
parentfa15286a758eb036258bffae2b6c128e2a477cc3 (diff)
downloadqemu-arm-3048ed6aac8bd7622e1f9c82ebe83f819b5d6b75.tar.gz
net: cadence_gem: Comment spelling sweep
Fix some typos in comments. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
-rw-r--r--hw/net/cadence_gem.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index cfb696a733..fe40b4eca1 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -50,7 +50,7 @@
#define GEM_IER (0x00000028/4) /* Interrupt Enable reg */
#define GEM_IDR (0x0000002C/4) /* Interrupt Disable reg */
#define GEM_IMR (0x00000030/4) /* Interrupt Mask reg */
-#define GEM_PHYMNTNC (0x00000034/4) /* Phy Maintaince reg */
+#define GEM_PHYMNTNC (0x00000034/4) /* Phy Maintenance reg */
#define GEM_RXPAUSE (0x00000038/4) /* RX Pause Time reg */
#define GEM_TXPAUSE (0x0000003C/4) /* TX Pause Time reg */
#define GEM_TXPARTIALSF (0x00000040/4) /* TX Partial Store and Forward */
@@ -150,7 +150,7 @@
#define GEM_NWCTRL_LOCALLOOP 0x00000002 /* Local Loopback */
#define GEM_NWCFG_STRIP_FCS 0x00020000 /* Strip FCS field */
-#define GEM_NWCFG_LERR_DISC 0x00010000 /* Discard RX frames with lenth err */
+#define GEM_NWCFG_LERR_DISC 0x00010000 /* Discard RX frames with len err */
#define GEM_NWCFG_BUFF_OFST_M 0x0000C000 /* Receive buffer offset mask */
#define GEM_NWCFG_BUFF_OFST_S 14 /* Receive buffer offset shift */
#define GEM_NWCFG_UCAST_HASH 0x00000080 /* accept unicast if hash match */
@@ -397,7 +397,7 @@ static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
*/
static void gem_init_register_masks(GemState *s)
{
- /* Mask of register bits which are read only*/
+ /* Mask of register bits which are read only */
memset(&s->regs_ro[0], 0, sizeof(s->regs_ro));
s->regs_ro[GEM_NWCTRL] = 0xFFF80000;
s->regs_ro[GEM_NWSTATUS] = 0xFFFFFFFF;
@@ -719,7 +719,7 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
unsigned crc_val;
/* The application wants the FCS field, which QEMU does not provide.
- * We must try and caclculate one.
+ * We must try and calculate one.
*/
memcpy(rxbuf, buf, size);
@@ -871,7 +871,7 @@ static void gem_transmit(GemState *s)
DB_PRINT("\n");
- /* The packet we will hand off to qemu.
+ /* The packet we will hand off to QEMU.
* Packets scattered across multiple descriptors are gathered to this
* one contiguous buffer first.
*/
@@ -923,7 +923,7 @@ static void gem_transmit(GemState *s)
tx_desc_set_used(desc_first);
cpu_physical_memory_write(s->tx_desc_addr, (uint8_t *)desc_first,
sizeof(desc_first));
- /* Advance the hardare current descriptor past this packet */
+ /* Advance the hardware current descriptor past this packet */
if (tx_desc_get_wrap(desc)) {
s->tx_desc_addr = s->regs[GEM_TXQBASE];
} else {