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authorPrasad J Pandit <pjp@fedoraproject.org>2016-10-12 18:07:41 +0530
committerYongbok Kim <yongbok.kim@imgtec.com>2017-03-20 11:19:55 +0000
commitc0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c (patch)
tree353de1e031db28de89471cc3bd3470e6dec83673
parent075a1fe788d36b271ec25507466c30b9a90b5d54 (diff)
downloadqemu-arm-c0a3172fa6bbddcc73192f2a2c48d0bf3a7ba61c.tar.gz
dma: rc4030: limit interval timer reload value
The JAZZ RC4030 chipset emulator has a periodic timer and associated interval reload register. The reload value is used as divider when computing timer's next tick value. If reload value is large, it could lead to divide by zero error. Limit the interval reload value to avoid it. Reported-by: Huawei PSIRT <psirt@huawei.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
-rw-r--r--hw/dma/rc4030.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index 17c8518fea..41fc043464 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -460,7 +460,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data,
break;
/* Interval timer reload */
case 0x0228:
- s->itr = val;
+ s->itr = val & 0x01FF;
qemu_irq_lower(s->timer_irq);
set_next_tick(s);
break;