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authorAnthony Liguori <aliguori@us.ibm.com>2013-05-08 15:54:36 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-05-08 15:54:36 -0500
commitcad2b59c198340a636c5e015fb90e0326a1d3dd7 (patch)
tree1441c300722db4bda79e32a1e61e9e1c7f997a43
parent5f5a1318653c08e435cfa52f60b6a712815b659d (diff)
parent794d00f71d39e3d18eafade579b2ecb665d6d481 (diff)
downloadqemu-arm-cad2b59c198340a636c5e015fb90e0326a1d3dd7.tar.gz
Merge remote-tracking branch 'kwolf/for-anthony' into staging
# By Kevin Wolf (7) and Fam Zheng (3) # Via Kevin Wolf * kwolf/for-anthony: qemu-iotests: fix 017 018 for vmdk qemu-iotests: exclude vmdk and qcow from 043 qemu-iotests: exclude vmdk for test 042 qtest/ide-test: Test short and long PRDTs qtest/ide-test: Add simple DMA read/write test case qtest: Add IDE test case libqos/pci: Enable bus mastering ide: Reset BMIDEA bit when the bus master is stopped de_DE.po: Add missing leading spaces ahci: Don't allow creating slave drives Message-id: 1368023344-29731-1-git-send-email-kwolf@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
-rw-r--r--hw/ide/ahci.c2
-rw-r--r--hw/ide/cmd646.c2
-rw-r--r--hw/ide/internal.h3
-rw-r--r--hw/ide/isa.c2
-rw-r--r--hw/ide/macio.c2
-rw-r--r--hw/ide/mmio.c2
-rw-r--r--hw/ide/pci.c1
-rw-r--r--hw/ide/piix.c2
-rw-r--r--hw/ide/qdev.c10
-rw-r--r--hw/ide/via.c2
-rw-r--r--po/de_DE.po4
-rw-r--r--tests/Makefile2
-rw-r--r--tests/ide-test.c440
-rw-r--r--tests/libqos/pci.c2
-rwxr-xr-xtests/qemu-iotests/0174
-rw-r--r--tests/qemu-iotests/017.out2
-rwxr-xr-xtests/qemu-iotests/0184
-rw-r--r--tests/qemu-iotests/018.out2
-rwxr-xr-xtests/qemu-iotests/0422
-rwxr-xr-xtests/qemu-iotests/0432
20 files changed, 474 insertions, 18 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 3405583f59..eab60961bd 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1163,7 +1163,7 @@ void ahci_init(AHCIState *s, DeviceState *qdev, DMAContext *dma, int ports)
for (i = 0; i < s->ports; i++) {
AHCIDevice *ad = &s->dev[i];
- ide_bus_new(&ad->port, qdev, i);
+ ide_bus_new(&ad->port, qdev, i, 1);
ide_init2(&ad->port, irqs[i]);
ad->hba = s;
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 541d4ef335..a73eb9a5f7 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -281,7 +281,7 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
for (i = 0; i < 2; i++) {
- ide_bus_new(&d->bus[i], &d->dev.qdev, i);
+ ide_bus_new(&d->bus[i], &d->dev.qdev, i, 2);
ide_init2(&d->bus[i], irq[i]);
bmdma_init(&d->bus[i], &d->bmdma[i], d);
diff --git a/hw/ide/internal.h b/hw/ide/internal.h
index 0efb2da19b..03f14896d6 100644
--- a/hw/ide/internal.h
+++ b/hw/ide/internal.h
@@ -450,6 +450,7 @@ struct IDEBus {
IDEDevice *slave;
IDEState ifs[2];
int bus_id;
+ int max_units;
IDEDMA *dma;
uint8_t unit;
uint8_t cmd;
@@ -574,7 +575,7 @@ void ide_atapi_cmd(IDEState *s);
void ide_atapi_cmd_reply_end(IDEState *s);
/* hw/ide/qdev.c */
-void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id);
+void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id, int max_units);
IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
#endif /* HW_IDE_INTERNAL_H */
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index 5e7422fc2b..369a7fa58a 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -69,7 +69,7 @@ static int isa_ide_initfn(ISADevice *dev)
{
ISAIDEState *s = ISA_IDE(dev);
- ide_bus_new(&s->bus, DEVICE(dev), 0);
+ ide_bus_new(&s->bus, DEVICE(dev), 0, 2);
ide_init_ioport(&s->bus, dev, s->iobase, s->iobase2);
isa_init_irq(dev, &s->irq, s->isairq);
ide_init2(&s->bus, s->irq);
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index 64b2406ab0..bf12a100d4 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -334,7 +334,7 @@ static void macio_ide_initfn(Object *obj)
SysBusDevice *d = SYS_BUS_DEVICE(obj);
MACIOIDEState *s = MACIO_IDE(obj);
- ide_bus_new(&s->bus, DEVICE(obj), 0);
+ ide_bus_new(&s->bus, DEVICE(obj), 0, 2);
memory_region_init_io(&s->mem, &pmac_ide_ops, s, "pmac-ide", 0x1000);
sysbus_init_mmio(d, &s->mem);
sysbus_init_irq(d, &s->irq);
diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c
index ce88c3a651..e80e7e5af8 100644
--- a/hw/ide/mmio.c
+++ b/hw/ide/mmio.c
@@ -137,7 +137,7 @@ static void mmio_ide_initfn(Object *obj)
SysBusDevice *d = SYS_BUS_DEVICE(obj);
MMIOState *s = MMIO_IDE(obj);
- ide_bus_new(&s->bus, DEVICE(obj), 0);
+ ide_bus_new(&s->bus, DEVICE(obj), 0, 2);
sysbus_init_irq(d, &s->irq);
}
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index a310975391..635a364dd8 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -312,6 +312,7 @@ void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)
bdrv_drain_all();
assert(bm->bus->dma->aiocb == NULL);
}
+ bm->status &= ~BM_STATUS_DMAING;
} else {
bm->cur_addr = bm->addr;
if (!(bm->status & BM_STATUS_DMAING)) {
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 1de284d0e3..bf2856fb69 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -135,7 +135,7 @@ static void pci_piix_init_ports(PCIIDEState *d) {
int i;
for (i = 0; i < 2; i++) {
- ide_bus_new(&d->bus[i], &d->dev.qdev, i);
+ ide_bus_new(&d->bus[i], &d->dev.qdev, i, 2);
ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase,
port_info[i].iobase2);
ide_init2(&d->bus[i], isa_get_irq(NULL, port_info[i].isairq));
diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c
index 8a9a891769..6a272b046d 100644
--- a/hw/ide/qdev.c
+++ b/hw/ide/qdev.c
@@ -47,10 +47,11 @@ static const TypeInfo ide_bus_info = {
.class_init = ide_bus_class_init,
};
-void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id)
+void ide_bus_new(IDEBus *idebus, DeviceState *dev, int bus_id, int max_units)
{
qbus_create_inplace(&idebus->qbus, TYPE_IDE_BUS, dev, NULL);
idebus->bus_id = bus_id;
+ idebus->max_units = max_units;
}
static char *idebus_get_fw_dev_path(DeviceState *dev)
@@ -76,6 +77,13 @@ static int ide_qdev_init(DeviceState *qdev)
if (dev->unit == -1) {
dev->unit = bus->master ? 1 : 0;
}
+
+ if (dev->unit >= bus->max_units) {
+ error_report("Can't create IDE unit %d, bus supports only %d units",
+ dev->unit, bus->max_units);
+ goto err;
+ }
+
switch (dev->unit) {
case 0:
if (bus->master) {
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 9d6a644391..5fe053cf97 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -158,7 +158,7 @@ static void vt82c686b_init_ports(PCIIDEState *d) {
int i;
for (i = 0; i < 2; i++) {
- ide_bus_new(&d->bus[i], &d->dev.qdev, i);
+ ide_bus_new(&d->bus[i], &d->dev.qdev, i, 2);
ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase,
port_info[i].iobase2);
ide_init2(&d->bus[i], isa_get_irq(NULL, port_info[i].isairq));
diff --git a/po/de_DE.po b/po/de_DE.po
index 92c5df5307..e35aaf4871 100644
--- a/po/de_DE.po
+++ b/po/de_DE.po
@@ -18,11 +18,11 @@ msgstr ""
#: ../ui/gtk.c:213
msgid " - Press Ctrl+Alt+G to release grab"
-msgstr "- Strg+Alt+G drücken, um Eingabegeräte freizugeben"
+msgstr " - Strg+Alt+G drücken, um Eingabegeräte freizugeben"
#: ../ui/gtk.c:217
msgid " [Paused]"
-msgstr "[Angehalten]"
+msgstr " [Angehalten]"
#: ../ui/gtk.c:1250
msgid "_Machine"
diff --git a/tests/Makefile b/tests/Makefile
index bf41d10050..a307d5a952 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -51,6 +51,7 @@ check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh
# really in libqtest, not in the testcases themselves.
check-qtest-i386-y = tests/fdc-test$(EXESUF)
gcov-files-i386-y = hw/fdc.c
+check-qtest-i386-y += tests/ide-test$(EXESUF)
check-qtest-i386-y += tests/hd-geo-test$(EXESUF)
gcov-files-i386-y += hw/hd-geometry.c
check-qtest-i386-y += tests/rtc-test$(EXESUF)
@@ -127,6 +128,7 @@ libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o
tests/rtc-test$(EXESUF): tests/rtc-test.o
tests/m48t59-test$(EXESUF): tests/m48t59-test.o
tests/fdc-test$(EXESUF): tests/fdc-test.o
+tests/ide-test$(EXESUF): tests/ide-test.o $(libqos-pc-obj-y)
tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o
tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
diff --git a/tests/ide-test.c b/tests/ide-test.c
new file mode 100644
index 0000000000..bdc1da7dfe
--- /dev/null
+++ b/tests/ide-test.c
@@ -0,0 +1,440 @@
+/*
+ * IDE test cases
+ *
+ * Copyright (c) 2013 Kevin Wolf <kwolf@redhat.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+
+#include <glib.h>
+
+#include "libqtest.h"
+#include "libqos/pci-pc.h"
+#include "libqos/malloc-pc.h"
+
+#include "qemu-common.h"
+#include "hw/pci/pci_ids.h"
+#include "hw/pci/pci_regs.h"
+
+#define TEST_IMAGE_SIZE 64 * 1024 * 1024
+
+#define IDE_PCI_DEV 1
+#define IDE_PCI_FUNC 1
+
+#define IDE_BASE 0x1f0
+#define IDE_PRIMARY_IRQ 14
+
+enum {
+ reg_data = 0x0,
+ reg_nsectors = 0x2,
+ reg_lba_low = 0x3,
+ reg_lba_middle = 0x4,
+ reg_lba_high = 0x5,
+ reg_device = 0x6,
+ reg_status = 0x7,
+ reg_command = 0x7,
+};
+
+enum {
+ BSY = 0x80,
+ DRDY = 0x40,
+ DF = 0x20,
+ DRQ = 0x08,
+ ERR = 0x01,
+};
+
+enum {
+ LBA = 0x40,
+};
+
+enum {
+ bmreg_cmd = 0x0,
+ bmreg_status = 0x2,
+ bmreg_prdt = 0x4,
+};
+
+enum {
+ CMD_READ_DMA = 0xc8,
+ CMD_WRITE_DMA = 0xca,
+ CMD_IDENTIFY = 0xec,
+
+ CMDF_ABORT = 0x100,
+};
+
+enum {
+ BM_CMD_START = 0x1,
+ BM_CMD_WRITE = 0x8, /* write = from device to memory */
+};
+
+enum {
+ BM_STS_ACTIVE = 0x1,
+ BM_STS_ERROR = 0x2,
+ BM_STS_INTR = 0x4,
+};
+
+enum {
+ PRDT_EOT = 0x80000000,
+};
+
+#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
+#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
+
+static QPCIBus *pcibus = NULL;
+static QGuestAllocator *guest_malloc;
+
+static char tmp_path[] = "/tmp/qtest.XXXXXX";
+
+static void ide_test_start(const char *cmdline_fmt, ...)
+{
+ va_list ap;
+ char *cmdline;
+
+ va_start(ap, cmdline_fmt);
+ cmdline = g_strdup_vprintf(cmdline_fmt, ap);
+ va_end(ap);
+
+ qtest_start(cmdline);
+ qtest_irq_intercept_in(global_qtest, "ioapic");
+ guest_malloc = pc_alloc_init();
+}
+
+static void ide_test_quit(void)
+{
+ qtest_quit(global_qtest);
+}
+
+static QPCIDevice *get_pci_device(uint16_t *bmdma_base)
+{
+ QPCIDevice *dev;
+ uint16_t vendor_id, device_id;
+
+ if (!pcibus) {
+ pcibus = qpci_init_pc();
+ }
+
+ /* Find PCI device and verify it's the right one */
+ dev = qpci_device_find(pcibus, QPCI_DEVFN(IDE_PCI_DEV, IDE_PCI_FUNC));
+ g_assert(dev != NULL);
+
+ vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID);
+ device_id = qpci_config_readw(dev, PCI_DEVICE_ID);
+ g_assert(vendor_id == PCI_VENDOR_ID_INTEL);
+ g_assert(device_id == PCI_DEVICE_ID_INTEL_82371SB_1);
+
+ /* Map bmdma BAR */
+ *bmdma_base = (uint16_t)(uintptr_t) qpci_iomap(dev, 4);
+
+ qpci_device_enable(dev);
+
+ return dev;
+}
+
+static void free_pci_device(QPCIDevice *dev)
+{
+ /* libqos doesn't have a function for this, so free it manually */
+ g_free(dev);
+}
+
+typedef struct PrdtEntry {
+ uint32_t addr;
+ uint32_t size;
+} QEMU_PACKED PrdtEntry;
+
+#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
+#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
+
+static int send_dma_request(int cmd, uint64_t sector, int nb_sectors,
+ PrdtEntry *prdt, int prdt_entries)
+{
+ QPCIDevice *dev;
+ uint16_t bmdma_base;
+ uintptr_t guest_prdt;
+ size_t len;
+ bool from_dev;
+ uint8_t status;
+ int flags;
+
+ dev = get_pci_device(&bmdma_base);
+
+ flags = cmd & ~0xff;
+ cmd &= 0xff;
+
+ switch (cmd) {
+ case CMD_READ_DMA:
+ from_dev = true;
+ break;
+ case CMD_WRITE_DMA:
+ from_dev = false;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ /* Select device 0 */
+ outb(IDE_BASE + reg_device, 0 | LBA);
+
+ /* Stop any running transfer, clear any pending interrupt */
+ outb(bmdma_base + bmreg_cmd, 0);
+ outb(bmdma_base + bmreg_status, BM_STS_INTR);
+
+ /* Setup PRDT */
+ len = sizeof(*prdt) * prdt_entries;
+ guest_prdt = guest_alloc(guest_malloc, len);
+ memwrite(guest_prdt, prdt, len);
+ outl(bmdma_base + bmreg_prdt, guest_prdt);
+
+ /* ATA DMA command */
+ outb(IDE_BASE + reg_nsectors, nb_sectors);
+
+ outb(IDE_BASE + reg_lba_low, sector & 0xff);
+ outb(IDE_BASE + reg_lba_middle, (sector >> 8) & 0xff);
+ outb(IDE_BASE + reg_lba_high, (sector >> 16) & 0xff);
+
+ outb(IDE_BASE + reg_command, cmd);
+
+ /* Start DMA transfer */
+ outb(bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0));
+
+ if (flags & CMDF_ABORT) {
+ outb(bmdma_base + bmreg_cmd, 0);
+ }
+
+ /* Wait for the DMA transfer to complete */
+ do {
+ status = inb(bmdma_base + bmreg_status);
+ } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE);
+
+ g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR));
+
+ /* Check IDE status code */
+ assert_bit_set(inb(IDE_BASE + reg_status), DRDY);
+ assert_bit_clear(inb(IDE_BASE + reg_status), BSY | DRQ);
+
+ /* Reading the status register clears the IRQ */
+ g_assert(!get_irq(IDE_PRIMARY_IRQ));
+
+ /* Stop DMA transfer if still active */
+ if (status & BM_STS_ACTIVE) {
+ outb(bmdma_base + bmreg_cmd, 0);
+ }
+
+ free_pci_device(dev);
+
+ return status;
+}
+
+static void test_bmdma_simple_rw(void)
+{
+ uint8_t status;
+ uint8_t *buf;
+ uint8_t *cmpbuf;
+ size_t len = 512;
+ uintptr_t guest_buf = guest_alloc(guest_malloc, len);
+
+ PrdtEntry prdt[] = {
+ { .addr = guest_buf, .size = len | PRDT_EOT },
+ };
+
+ buf = g_malloc(len);
+ cmpbuf = g_malloc(len);
+
+ /* Write 0x55 pattern to sector 0 */
+ memset(buf, 0x55, len);
+ memwrite(guest_buf, buf, len);
+
+ status = send_dma_request(CMD_WRITE_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ /* Write 0xaa pattern to sector 1 */
+ memset(buf, 0xaa, len);
+ memwrite(guest_buf, buf, len);
+
+ status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ /* Read and verify 0x55 pattern in sector 0 */
+ memset(cmpbuf, 0x55, len);
+
+ status = send_dma_request(CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ memread(guest_buf, buf, len);
+ g_assert(memcmp(buf, cmpbuf, len) == 0);
+
+ /* Read and verify 0xaa pattern in sector 1 */
+ memset(cmpbuf, 0xaa, len);
+
+ status = send_dma_request(CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ memread(guest_buf, buf, len);
+ g_assert(memcmp(buf, cmpbuf, len) == 0);
+
+
+ g_free(buf);
+ g_free(cmpbuf);
+}
+
+static void test_bmdma_short_prdt(void)
+{
+ uint8_t status;
+
+ PrdtEntry prdt[] = {
+ { .addr = 0, .size = 0x10 | PRDT_EOT },
+ };
+
+ /* Normal request */
+ status = send_dma_request(CMD_READ_DMA, 0, 1,
+ prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, 0);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ /* Abort the request before it completes */
+ status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
+ prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, 0);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+}
+
+static void test_bmdma_long_prdt(void)
+{
+ uint8_t status;
+
+ PrdtEntry prdt[] = {
+ { .addr = 0, .size = 0x1000 | PRDT_EOT },
+ };
+
+ /* Normal request */
+ status = send_dma_request(CMD_READ_DMA, 0, 1,
+ prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+
+ /* Abort the request before it completes */
+ status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
+ prdt, ARRAY_SIZE(prdt));
+ g_assert_cmphex(status, ==, BM_STS_INTR);
+ assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
+}
+
+static void test_bmdma_setup(void)
+{
+ ide_test_start(
+ "-vnc none "
+ "-drive file=%s,if=ide,serial=%s,cache=writeback "
+ "-global ide-hd.ver=%s",
+ tmp_path, "testdisk", "version");
+}
+
+static void test_bmdma_teardown(void)
+{
+ ide_test_quit();
+}
+
+static void test_identify(void)
+{
+ uint8_t data;
+ uint16_t buf[256];
+ int i;
+ int ret;
+
+ ide_test_start(
+ "-vnc none "
+ "-drive file=%s,if=ide,serial=%s,cache=writeback "
+ "-global ide-hd.ver=%s",
+ tmp_path, "testdisk", "version");
+
+ /* IDENTIFY command on device 0*/
+ outb(IDE_BASE + reg_device, 0);
+ outb(IDE_BASE + reg_command, CMD_IDENTIFY);
+
+ /* Read in the IDENTIFY buffer and check registers */
+ data = inb(IDE_BASE + reg_device);
+ g_assert_cmpint(data & 0x10, ==, 0);
+
+ for (i = 0; i < 256; i++) {
+ data = inb(IDE_BASE + reg_status);
+ assert_bit_set(data, DRDY | DRQ);
+ assert_bit_clear(data, BSY | DF | ERR);
+
+ ((uint16_t*) buf)[i] = inw(IDE_BASE + reg_data);
+ }
+
+ data = inb(IDE_BASE + reg_status);
+ assert_bit_set(data, DRDY);
+ assert_bit_clear(data, BSY | DF | ERR | DRQ);
+
+ /* Check serial number/version in the buffer */
+ ret = memcmp(&buf[10], "ettsidks ", 20);
+ g_assert(ret == 0);
+
+ ret = memcmp(&buf[23], "evsroi n", 8);
+ g_assert(ret == 0);
+
+ /* Write cache enabled bit */
+ assert_bit_set(buf[85], 0x20);
+
+ ide_test_quit();
+}
+
+int main(int argc, char **argv)
+{
+ const char *arch = qtest_get_arch();
+ int fd;
+ int ret;
+
+ /* Check architecture */
+ if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
+ g_test_message("Skipping test for non-x86\n");
+ return 0;
+ }
+
+ /* Create a temporary raw image */
+ fd = mkstemp(tmp_path);
+ g_assert(fd >= 0);
+ ret = ftruncate(fd, TEST_IMAGE_SIZE);
+ g_assert(ret == 0);
+ close(fd);
+
+ /* Run the tests */
+ g_test_init(&argc, &argv, NULL);
+
+ qtest_add_func("/ide/identify", test_identify);
+
+ qtest_add_func("/ide/bmdma/setup", test_bmdma_setup);
+ qtest_add_func("/ide/bmdma/simple_rw", test_bmdma_simple_rw);
+ qtest_add_func("/ide/bmdma/short_prdt", test_bmdma_short_prdt);
+ qtest_add_func("/ide/bmdma/long_prdt", test_bmdma_long_prdt);
+ qtest_add_func("/ide/bmdma/teardown", test_bmdma_teardown);
+
+ ret = g_test_run();
+
+ /* Cleanup */
+ unlink(tmp_path);
+
+ return ret;
+}
diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c
index 95e287be65..7e0907b514 100644
--- a/tests/libqos/pci.c
+++ b/tests/libqos/pci.c
@@ -71,7 +71,7 @@ void qpci_device_enable(QPCIDevice *dev)
/* FIXME -- does this need to be a bus callout? */
cmd = qpci_config_readw(dev, PCI_COMMAND);
- cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
+ cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
qpci_config_writew(dev, PCI_COMMAND, cmd);
}
diff --git a/tests/qemu-iotests/017 b/tests/qemu-iotests/017
index 66951eb1a8..45f2c0b055 100755
--- a/tests/qemu-iotests/017
+++ b/tests/qemu-iotests/017
@@ -46,6 +46,8 @@ _supported_os Linux
TEST_OFFSETS="0 4294967296"
+TEST_IMG_SAVE=$TEST_IMG
+TEST_IMG=$TEST_IMG.base
_make_test_img 6G
echo "Filling base image"
@@ -63,7 +65,7 @@ _check_test_img
echo "Creating test image with backing file"
echo
-mv $TEST_IMG $TEST_IMG.base
+TEST_IMG=$TEST_IMG_SAVE
_make_test_img -b $TEST_IMG.base 6G
echo "Filling test image"
diff --git a/tests/qemu-iotests/017.out b/tests/qemu-iotests/017.out
index a861e58331..df34ee78c4 100644
--- a/tests/qemu-iotests/017.out
+++ b/tests/qemu-iotests/017.out
@@ -1,5 +1,5 @@
QA output created by 017
-Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=6442450944
+Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=6442450944
Filling base image
=== IO: pattern 0
diff --git a/tests/qemu-iotests/018 b/tests/qemu-iotests/018
index bd2db78715..453ce61e75 100755
--- a/tests/qemu-iotests/018
+++ b/tests/qemu-iotests/018
@@ -46,6 +46,8 @@ _supported_os Linux
TEST_OFFSETS="0 4294967296"
+TEST_IMG_SAVE=$TEST_IMG
+TEST_IMG=$TEST_IMG.base
_make_test_img 6G
echo "Filling base image"
@@ -63,7 +65,7 @@ _check_test_img
echo "Creating test image with backing file"
echo
-mv $TEST_IMG $TEST_IMG.base
+TEST_IMG=$TEST_IMG_SAVE
_make_test_img -b $TEST_IMG.base 6G
echo "Filling test image"
diff --git a/tests/qemu-iotests/018.out b/tests/qemu-iotests/018.out
index 6bbd815ce7..3ddb8d8f6f 100644
--- a/tests/qemu-iotests/018.out
+++ b/tests/qemu-iotests/018.out
@@ -1,5 +1,5 @@
QA output created by 018
-Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=6442450944
+Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=6442450944
Filling base image
=== IO: pattern 0
diff --git a/tests/qemu-iotests/042 b/tests/qemu-iotests/042
index c3c3ca8d02..16b2fdbd5e 100755
--- a/tests/qemu-iotests/042
+++ b/tests/qemu-iotests/042
@@ -38,7 +38,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
. ./common.rc
. ./common.filter
-_supported_fmt qcow2 qcow qed vmdk
+_supported_fmt qcow2 qcow qed
_supported_proto file
_supported_os Linux
diff --git a/tests/qemu-iotests/043 b/tests/qemu-iotests/043
index 3ba08dc94e..478773d102 100755
--- a/tests/qemu-iotests/043
+++ b/tests/qemu-iotests/043
@@ -40,7 +40,7 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
. ./common.filter
# Any format supporting backing files
-_supported_fmt qcow qcow2 vmdk qed
+_supported_fmt qcow2 qed
_supported_proto generic
_supported_os Linux