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authorAurelien Jarno <aurelien@aurel32.net>2013-05-09 19:36:41 +0200
committerAurelien Jarno <aurelien@aurel32.net>2013-05-10 19:59:54 +0200
commit38ebb396c955ceb2ef7e246248ceb7f8bfe1b774 (patch)
tree669165f6337c4d877785117d995dae56b6da0807
parent66e61b55f158ef5628e4c056dd2f233c9351a3f5 (diff)
downloadqemu-arm-38ebb396c955ceb2ef7e246248ceb7f8bfe1b774.tar.gz
target-i386: ROR r8/r16 imm instruction fix
Fix EFLAGS corruption by ROR r8/r16 imm instruction located at the end of the TB, similarly to commit 089305ac for the non-immediate case. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-i386/translate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 524a0b480e..0aeccdbc59 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1871,6 +1871,7 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
if (is_right) {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask - 1);
tcg_gen_shri_tl(cpu_cc_dst, cpu_T[0], mask);
+ tcg_gen_andi_tl(cpu_cc_dst, cpu_cc_dst, 1);
} else {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask);
tcg_gen_andi_tl(cpu_cc_dst, cpu_T[0], 1);