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authorAlexander Graf <agraf@suse.de>2013-08-09 14:19:00 +0100
committerPeter Maydell <peter.maydell@linaro.org>2013-09-03 19:30:18 +0100
commit13064a4e1b16fdace4a50a4be800e53bfd86c61d (patch)
treed235931c1a91718a515352a1c0979154a8cacea5
parent5ea101322cc672c08421c7918ff91b46f54780b6 (diff)
downloadqemu-arm-13064a4e1b16fdace4a50a4be800e53bfd86c61d.tar.gz
target-arm: Export cpu_env
The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Message-id: 1368505980-17151-3-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/translate.c2
-rw-r--r--target-arm/translate.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 1bb6f46c7d..a6adcc89a4 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -60,7 +60,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#define DISAS_WFI 4
#define DISAS_SWI 5
-static TCGv_ptr cpu_env;
+TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
diff --git a/target-arm/translate.h b/target-arm/translate.h
index e727bc66fe..8ba14339a9 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -24,4 +24,6 @@ typedef struct DisasContext {
int vec_stride;
} DisasContext;
+extern TCGv_ptr cpu_env;
+
#endif /* TARGET_ARM_TRANSLATE_H */