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authorPeter Maydell <peter.maydell@linaro.org>2012-07-03 09:58:10 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-07-03 09:58:10 +0000
commit5bad9d00e92d60ab0b1bdebecf78aed7f31e1edc (patch)
treec9d127f47b967fbdef6f26a259bc9a5e0f68faca
parent4262313b5381b47ee958f7046c7eea117929c62e (diff)
downloadqemu-arm-5bad9d00e92d60ab0b1bdebecf78aed7f31e1edc.tar.gz
ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits
Make target_phys_addr_t 64 bits for ARM targets, and set TARGET_PHYS_ADDR_SPACE_BITS to 40. This should have no effect for ARM boards where physical addresses really are 32 bits (except perhaps a slight performance hit on 32 bit hosts for system emulation) but allows us to implement the Large Physical Address Extensions for Cortex-A15, which mean 40 bit physical addresses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rwxr-xr-xconfigure2
-rw-r--r--target-arm/cpu.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/configure b/configure
index 9f071b7876..8b992625f2 100755
--- a/configure
+++ b/configure
@@ -3573,7 +3573,7 @@ case "$target_arch2" in
bflt="yes"
target_nptl="yes"
gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
- target_phys_bits=32
+ target_phys_bits=64
target_llong_alignment=4
target_libs_softmmu="$fdt_libs"
;;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 33afa185e9..aadfca0a26 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -619,7 +619,7 @@ static inline bool cp_access_ok(CPUARMState *env,
#define TARGET_PAGE_BITS 10
#endif
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_PHYS_ADDR_SPACE_BITS 40
#define TARGET_VIRT_ADDR_SPACE_BITS 32
static inline CPUARMState *cpu_init(const char *cpu_model)