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authorPeter Maydell <peter.maydell@linaro.org>2012-07-03 09:58:09 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-07-03 09:58:09 +0000
commit42a1976ec06574ab7a02d3751d8a9a34c3ceba3f (patch)
treee9b2516d38530574f2cc208abbd6d1aa1dad18c6
parentf1aa3b38504c83204e2f9e4e7d6f02f1d394ae68 (diff)
downloadqemu-arm-42a1976ec06574ab7a02d3751d8a9a34c3ceba3f.tar.gz
target-arm: Fix typo that meant TTBR1 accesses went to TTBR0
Fix a copy-and-paste error in the register description for TTBR1 that meant it was a duplicate of TTBR0 rather than affecting the correct bit of CPU state. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 23099236ad..ca5d8e9e28 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -679,7 +679,7 @@ static const ARMCPRegInfo vmsa_cp_reginfo[] = {
.fieldoffset = offsetof(CPUARMState, cp15.c2_base0), .resetvalue = 0, },
{ .name = "TTBR1", .cp = 15, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 1,
.access = PL1_RW,
- .fieldoffset = offsetof(CPUARMState, cp15.c2_base0), .resetvalue = 0, },
+ .fieldoffset = offsetof(CPUARMState, cp15.c2_base1), .resetvalue = 0, },
{ .name = "TTBCR", .cp = 15, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 2,
.access = PL1_RW, .writefn = vmsa_ttbcr_write,
.resetfn = vmsa_ttbcr_reset,