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author | Peter Maydell <peter.maydell@linaro.org> | 2020-02-14 17:05:46 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-14 17:05:46 +0000 |
commit | 3654d4d4e75b79b8d2c83800d532768330c9f74e (patch) | |
tree | 74432fa77e2940f389f228e8f083cfd0f9ac91e6 /.travis.yml | |
parent | 14a2dea4ef9bb44b7e4e1fe459b4a3f3546fa8c5 (diff) |
target/arm: Define an aa32_pmu_8_1 isar feature test function
Instead of open-coding a check on the ID_DFR0 PerfMon ID register
field, create a standardly-named isar_feature for "does AArch32 have
a v8.1 PMUv3" and use it.
This entails moving the id_dfr0 field into the ARMISARegisters struct.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to '.travis.yml')
0 files changed, 0 insertions, 0 deletions