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| author | johpow01 <john.powell@arm.com> | 2020-09-10 13:39:26 -0500 |
|---|---|---|
| committer | John Powell <john.powell@arm.com> | 2020-10-07 21:15:38 +0000 |
| commit | 35c75377a0642a75a0b8d0b309ae231da15bc470 (patch) | |
| tree | 0697572eb48b3655bc74b1241511a7b67072984c /docs | |
| parent | bb68a9d602e456dad89fbfc777cb435059d42964 (diff) | |
Workaround for Cortex A77 erratum 1925769
Cortex A77 erratum 1925769 is a Cat B erratum, present in older
revisions of the Cortex A77 processor core. The workaround is to
set bit 8 in the ECTLR_EL1 register, there is a small performance cost
(<0.5%) for setting this bit.
SDEN can be found here:
https://documentation-service.arm.com/static/5f7c35d0d3be967f7be46d33
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I9cf0e0b5dc1e3e32e24279d2632c759cc7bd7ce9
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 8152c00d5..c976b8b3a 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -260,6 +260,9 @@ For Cortex-A77, the following errata build flags are defined : - ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77 CPU. This needs to be enabled only for revision <= r1p1 of the CPU. +- ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77 + CPU. This needs to be enabled only for revision <= r1p1 of the CPU. + For Cortex-A78, the following errata build flags are defined : - ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78 |