/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/ {
	memory {
		reg = <0x10000000 0x40000000>;
	};

	regulators {
		compatible = "simple-bus";

		reg_usb_otg_vbus: usb_otg_vbus {
			compatible = "regulator-fixed";
			regulator-name = "usb_otg_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio3 22 0>;
			enable-active-high;
		};

		reg_usb_h1_vbus: usb_h1_vbus {
			compatible = "regulator-fixed";
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 29 0>;
			enable-active-high;
		};

		reg_audio: wm8962_supply {
			compatible = "regulator-fixed";
			regulator-name = "wm8962-supply";
			gpio = <&gpio4 10 0>;
			enable-active-high;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		volume-up {
			label = "Volume Up";
			gpios = <&gpio1 4 0>;
			gpio-key,wakeup;
			linux,code = <115>; /* KEY_VOLUMEUP */
		};

		volume-down {
			label = "Volume Down";
			gpios = <&gpio1 5 0>;
			gpio-key,wakeup;
			linux,code = <114>; /* KEY_VOLUMEDOWN */
		};
	};

	sound {
		compatible = "fsl,imx6q-sabresd-wm8962",
			   "fsl,imx-audio-wm8962";
		model = "wm8962-audio";
		ssi-controller = <&ssi2>;
		audio-codec = <&codec>;
		audio-routing =
			"Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"MICBIAS", "AMIC",
			"IN3R", "MICBIAS",
			"DMIC", "MICBIAS",
			"DMICDAT", "DMIC";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux_2>;
	status = "okay";
};

&ecspi1 {
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio4 9 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1_2>;
	status = "okay";

	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p32";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet_1>;
	phy-mode = "rgmii";
	phy-reset-gpios = <&gpio1 25 0>;
	status = "okay";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1_2>;
	status = "okay";

	codec: wm8962@1a {
		compatible = "wlf,wm8962";
		reg = <0x1a>;
		clocks = <&clks 201>;
		DCVDD-supply = <&reg_audio>;
		DBVDD-supply = <&reg_audio>;
		AVDD-supply = <&reg_audio>;
		CPVDD-supply = <&reg_audio>;
		MICVDD-supply = <&reg_audio>;
		PLLVDD-supply = <&reg_audio>;
		SPKVDD1-supply = <&reg_audio>;
		SPKVDD2-supply = <&reg_audio>;
		gpio-cfg = <
			0x0000 /* 0:Default */
			0x0000 /* 1:Default */
			0x0013 /* 2:FN_DMICCLK */
			0x0000 /* 3:Default */
			0x8014 /* 4:FN_DMICCDAT */
			0x0000 /* 5:Default */
		>;
       };
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3_2>;
	status = "okay";

	egalax_ts@04 {
		compatible = "eeti,egalax_ts";
		reg = <0x04>;
		interrupt-parent = <&gpio6>;
		interrupts = <7 2>;
		wakeup-gpios = <&gpio6 7 0>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hog {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x80000000
				MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x80000000
				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
				MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
				MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
				MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
				MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
			>;
		};
	};
};

&ldb {
	status = "okay";

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <18>;
		status = "okay";

		display-timings {
			native-mode = <&timing0>;
			timing0: hsd100pxn1 {
				clock-frequency = <65000000>;
				hactive = <1024>;
				vactive = <768>;
				hback-porch = <220>;
				hfront-porch = <40>;
				vback-porch = <21>;
				vfront-porch = <7>;
				hsync-len = <60>;
				vsync-len = <10>;
			};
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_1>;
	status = "okay";
};

&ssi2 {
	fsl,mode = "i2s-slave";
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_1>;
	status = "okay";
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	vbus-supply = <&reg_usb_otg_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg_2>;
	disable-over-current;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2_1>;
	bus-width = <8>;
	cd-gpios = <&gpio2 2 0>;
	wp-gpios = <&gpio2 3 0>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3_1>;
	bus-width = <8>;
	cd-gpios = <&gpio2 0 0>;
	wp-gpios = <&gpio2 1 0>;
	status = "okay";
};