From a923fc730fdbbf079eadfe2b9a1644971bd95793 Mon Sep 17 00:00:00 2001 From: Vince Bridgers Date: Thu, 12 Feb 2015 10:47:33 -0600 Subject: net: eth: altera: Change access ports to mdio for all xMII applications Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 registers. This allows support for GMII, MII, RGMII, and SGMII designs where the external PHY is always accesible through Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible through MDIO phy 0 registers for SGMII applications. Signed-off-by: Vince Bridgers Tested-by: Kai Lin Ng Tested-by: Dalon Westergreen Signed-off-by: David S. Miller --- drivers/net/ethernet/altera/altera_tse_main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/net/ethernet/altera') diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c index 760c72c6e2ac..4773d98927cf 100644 --- a/drivers/net/ethernet/altera/altera_tse_main.c +++ b/drivers/net/ethernet/altera/altera_tse_main.c @@ -105,11 +105,11 @@ static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) /* set MDIO address */ csrwr32((mii_id & 0x1f), priv->mac_dev, - tse_csroffs(mdio_phy0_addr)); + tse_csroffs(mdio_phy1_addr)); /* get the data */ return csrrd32(priv->mac_dev, - tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff; + tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff; } static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, @@ -120,10 +120,10 @@ static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, /* set MDIO address */ csrwr32((mii_id & 0x1f), priv->mac_dev, - tse_csroffs(mdio_phy0_addr)); + tse_csroffs(mdio_phy1_addr)); /* write the data */ - csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4); + csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4); return 0; } -- cgit v1.2.3