daniel.thompson/linux.git - Personal repo for development and upstreaming. Contains significant work on NMI/FIQ.

Age	Commit message (Expand)	Author
2019-01-03	Remove 'type' argument from access_ok() function	Linus Torvalds
2018-12-21	RISC-V: Move from EARLY_PRINTK to SBI earlycon	Palmer Dabbelt
2018-12-21	riscv: remove unused variable in ftrace	David Abdurachmanov
2018-12-21	RISC-V: add of_node_put()	Yangtao Li
2018-12-21	RISC-V: Fix of_node_* refcount	Atish Patra
2018-12-17	RISC-V: Remove EARLY_PRINTK support	Anup Patel
2018-11-30	Merge tag 'trace-v4.20-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/...	Linus Torvalds
2018-11-27	riscv/function_graph: Simplify with function_graph_enter()	Steven Rostedt (VMware)
2018-11-20	RISC-V: recognize S/U mode bits in print_isa	Patrick Stählin
2018-11-20	RISC-V: Build flat and compressed kernel images	Anup Patel
2018-11-12	RISC-V: Silence some module warnings on 32-bit	Olof Johansson
2018-10-31	RISC-V: properly determine hardware caps	Andreas Schwab
2018-10-22	RISC-V: SMP cleanup and new features	Palmer Dabbelt
2018-10-22	RISC-V: Fix some RV32 bugs and build failures	Palmer Dabbelt
2018-10-22	riscv: Add support to no-FPU systems	Palmer Dabbelt
2018-10-22	RISC-V: remove the unused return_to_handler export	Christoph Hellwig
2018-10-22	RISC-V: Add FP register ptrace support for gdb.	Jim Wilson
2018-10-22	RISC-V: Mask out the F extension on systems without D	Palmer Dabbelt
2018-10-22	RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}	Palmer Dabbelt
2018-10-22	RISC-V: Show IPI stats	Anup Patel
2018-10-22	RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo	Anup Patel
2018-10-22	RISC-V: Use Linux logical CPU number instead of hartid	Atish Patra
2018-10-22	RISC-V: Add logical CPU indexing for RISC-V	Atish Patra
2018-10-22	RISC-V: Use WRITE_ONCE instead of direct access	Atish Patra
2018-10-22	RISC-V: Use mmgrab()	Palmer Dabbelt
2018-10-22	RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu	Palmer Dabbelt
2018-10-22	RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid	Palmer Dabbelt
2018-10-22	RISC-V: Disable preemption before enabling interrupts	Atish Patra
2018-10-22	RISC-V: Comment on the TLB flush in smp_callin()	Palmer Dabbelt
2018-10-22	RISC-V: Filter ISA and MMU values in cpuinfo	Palmer Dabbelt
2018-10-22	RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}	Palmer Dabbelt
2018-10-22	RISC-V: No need to pass scause as arg to do_IRQ()	Anup Patel
2018-10-22	RISC-V: Use swiotlb on RV64 only	Zong Li
2018-10-22	Auto-detect whether a FPU exists	Alan Kao
2018-10-22	Allow to disable FPU support	Alan Kao
2018-10-22	Refactor FPU code in signal setup/return procedures	Alan Kao
2018-10-22	Extract FPU context operations from entry.S	Alan Kao
2018-10-02	RISCV: Fix end PFN for low memory	Atish Patra
2018-09-04	riscv: Do not overwrite initrd_start and initrd_end	Guenter Roeck
2018-08-28	RISC-V: Use a less ugly workaround for unused variable warnings	Palmer Dabbelt
2018-08-20	RISC-V: Define sys_riscv_flush_icache when SMP=n	Palmer Dabbelt
2018-08-13	RISC-V: Fix !CONFIG_SMP compilation error	Atish Patra
2018-08-13	RISC-V: Add the directive for alignment of stvec's value	Zong Li
2018-08-13	clocksource: new RISC-V SBI timer driver	Palmer Dabbelt
2018-08-13	RISC-V: implement low-level interrupt handling	Christoph Hellwig
2018-08-13	RISC-V: simplify software interrupt / IPI code	Christoph Hellwig
2018-08-13	RISC-V: remove timer leftovers	Christoph Hellwig
2018-08-13	RISC-V: Add early printk support via the SBI console	Palmer Dabbelt
2018-08-13	RISC-V: Don't increment sepc after breakpoint.	Jim Wilson
2018-08-13	RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSO	Palmer Dabbelt