| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-06-09 | clocksource/drivers/timer-riscv: Use per-CPU timer interrupt | Anup Patel |
| 2020-06-09 | irqchip: RISC-V per-HART local interrupt controller driver | Anup Patel |
| 2020-06-09 | RISC-V: self-contained IPI handling routine | Anup Patel |
| 2019-10-28 | riscv: add missing header file includes | Paul Walmsley |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner |
| 2018-08-13 | RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h | Christoph Hellwig |
| 2018-08-13 | RISC-V: simplify software interrupt / IPI code | Christoph Hellwig |
| 2017-09-26 | RISC-V: Device, timer, IRQs, and the SBI | Palmer Dabbelt |
 |
index : daniel.thompson/linux.git | |
| Personal repo for development and upstreaming. Contains significant work on NMI/FIQ. |
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