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path: root/arch/mips/include/asm/mipsregs.h
AgeCommit message (Expand)Author
2018-11-09MIPS: Avoid using .set mips0 to restore ISAPaul Burton
2018-10-16MIPS: Cleanup DSP ASE detectionPaul Burton
2018-08-13Merge tag 'mips_4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...Linus Torvalds
2018-08-07MIPS: Use dins to simplify __write_64bit_c0_split()Paul Burton
2018-08-07MIPS: Use read-write output operand in __write_64bit_c0_split()Paul Burton
2018-07-27Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"Rafał Miłecki
2018-07-23MIPS: Loongson64: Define and use some CP0 registersHuacai Chen
2018-06-18MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratumTokunori Ikegami
2018-05-15MIPS: Probe for MIPS MT perf counters per TCMatt Redfearn
2018-02-19MIPS: Add crc instruction support flag to elf_hwcapMarcin Nowakowski
2018-01-22MIPS: XPA: Standardise readx/writex accessorsJames Hogan
2018-01-22MIPS: XPA: Allow use of $0 (zero) to MTHC0James Hogan
2018-01-22MIPS: XPA: Use XPA instructions in assemblyJames Hogan
2018-01-22MIPS: VZ: Pass GC0 register names in $n formatJames Hogan
2018-01-22MIPS: VZ: Update helpers to use new asm macrosJames Hogan
2018-01-22MIPS: Add helpers for assembler macro instructionsJames Hogan
2018-01-09MIPS: mipsregs.h: Make read_c0_prid use const accessorJames Hogan
2018-01-09MIPS: mipsregs.h: Add read const Cop0 macrosJames Hogan
2017-11-08MIPS: Use SLL by 0 for 32-bit truncation in `__read_64bit_c0_split'Maciej W. Rozycki
2017-09-21MIPS: Fix input modify in __write_64bit_c0_split()James Hogan
2017-08-30MIPS: Add accessor & bit definitions for GlobalNumberPaul Burton
2017-07-05MIPS: MIPS16e2: Identify ASE presenceMaciej W. Rozycki
2017-03-28KVM: MIPS/VZ: Handle Octeon III guest.PRid registerJames Hogan
2017-03-28MIPS: Add Octeon III register accessors & definitionsJames Hogan
2017-03-28MIPS: Add some missing guest CP0 accessors & defsJames Hogan
2017-03-28MIPS: Separate MAAR V bit into VL and VH for XPAJames Hogan
2017-02-14MIPS: Unify perf counter register definitionsJames Hogan
2016-11-24MIPS: Mask out limit field when calculating wired entry countPaul Burton
2016-09-29MIPS: Stop setting I6400 FTLBPPaul Burton
2016-06-15MIPS: Add define for Config.VI (virtual icache) bitJames Hogan
2016-06-15MIPS: Clean up RDHWR handlingJames Hogan
2016-05-28MIPS: Add 64-bit HTW fieldsJames Hogan
2016-05-28MIPS: Simplify DSP instruction encoding macrosJames Hogan
2016-05-28MIPS: Add missing tlbinvf/XPA microMIPS encodingsJames Hogan
2016-05-28MIPS: Add missing VZ accessor microMIPS encodingsJames Hogan
2016-05-28MIPS: Add inline asm encoding helpersJames Hogan
2016-05-28MIPS: Fix write_gc0_* macros when writing zeroJames Hogan
2016-05-28MIPS: Add definitions of SegCtl registers and use themMatt Redfearn
2016-05-17MIPS: Fix VZ probe gas errors with binutils <2.24James Hogan
2016-05-13MIPS: Add guest CP0 accessorsJames Hogan
2016-05-13MIPS: Add register definitions for VZ ASE registersJames Hogan
2016-05-13MIPS: Avoid magic numbers probing kscratch_maskJames Hogan
2016-05-13MIPS: Add defs & probing of [X]ContextConfigJames Hogan
2016-05-13MIPS: Add defs & probing of BadInstr[P] registersJames Hogan
2016-05-13MIPS: Add defs & probing of extended CP0_EBaseJames Hogan
2016-05-13MIPS: Define & use CP0_EBase bit definitionsJames Hogan
2016-05-13MIPS: Add & use CP0_EntryHi ASID definitionsJames Hogan
2016-05-13MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen
2016-05-13MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen
2016-05-13MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen