aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/anatop.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-imx/anatop.c')
-rw-r--r--arch/arm/mach-imx/anatop.c76
1 files changed, 39 insertions, 37 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 649a84c251ad..45d618abf26b 100644
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
@@ -30,6 +31,8 @@
#define ANADIG_DIGPROG_IMX6SL 0x280
#define ANADIG_DIGPROG_IMX7D 0x800
+#define SRC_SBMR2 0x1c
+
#define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000
#define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN 0x8
#define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000
@@ -116,6 +119,7 @@ void __init imx_init_revision_from_anatop(void)
unsigned int revision;
u32 digprog;
u16 offset = ANADIG_DIGPROG;
+ u8 major_part, minor_part;
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
anatop_base = of_iomap(np, 0);
@@ -127,45 +131,43 @@ void __init imx_init_revision_from_anatop(void)
digprog = readl_relaxed(anatop_base + offset);
iounmap(anatop_base);
- switch (digprog & 0xff) {
- case 0:
- /*
- * For i.MX6QP, most of the code for i.MX6Q can be resued,
- * so internally, we identify it as i.MX6Q Rev 2.0
- */
- if (digprog >> 8 & 0x01)
- revision = IMX_CHIP_REVISION_2_0;
- else
- revision = IMX_CHIP_REVISION_1_0;
- break;
- case 1:
- revision = IMX_CHIP_REVISION_1_1;
- break;
- case 2:
- revision = IMX_CHIP_REVISION_1_2;
- break;
- case 3:
- revision = IMX_CHIP_REVISION_1_3;
- break;
- case 4:
- revision = IMX_CHIP_REVISION_1_4;
- break;
- case 5:
- /*
- * i.MX6DQ TO1.5 is defined as Rev 1.3 in Data Sheet, marked
- * as 'D' in Part Number last character.
- */
- revision = IMX_CHIP_REVISION_1_5;
- break;
- default:
+ /*
+ * On i.MX7D digprog value match linux version format, so
+ * it needn't map again and we can use register value directly.
+ */
+ if (of_device_is_compatible(np, "fsl,imx7d-anatop")) {
+ revision = digprog & 0xff;
+ } else {
/*
- * Fail back to return raw register value instead of 0xff.
- * It will be easy to know version information in SOC if it
- * can't be recognized by known version. And some chip's (i.MX7D)
- * digprog value match linux version format, so it needn't map
- * again and we can use register value directly.
+ * MAJOR: [15:8], the major silicon revison;
+ * MINOR: [7: 0], the minor silicon revison;
+ *
+ * please refer to the i.MX RM for the detailed
+ * silicon revison bit define.
+ * format the major part and minor part to match the
+ * linux kernel soc version format.
*/
- revision = digprog & 0xff;
+ major_part = (digprog >> 8) & 0xf;
+ minor_part = digprog & 0xf;
+ revision = ((major_part + 1) << 4) | minor_part;
+
+ if ((digprog >> 16) == MXC_CPU_IMX6ULL) {
+ void __iomem *src_base;
+ u32 sbmr2;
+
+ np = of_find_compatible_node(NULL, NULL,
+ "fsl,imx6ul-src");
+ src_base = of_iomap(np, 0);
+ WARN_ON(!src_base);
+ sbmr2 = readl_relaxed(src_base + SRC_SBMR2);
+ iounmap(src_base);
+
+ /* src_sbmr2 bit 6 is to identify if it is i.MX6ULZ */
+ if (sbmr2 & (1 << 6)) {
+ digprog &= ~(0xff << 16);
+ digprog |= (MXC_CPU_IMX6ULZ << 16);
+ }
+ }
}
mxc_set_cpu_type(digprog >> 16 & 0xff);