diff options
author | Shangbing Hu <shangbing.hu@mediatek.com> | 2016-07-12 10:54:26 +0800 |
---|---|---|
committer | Shangbing Hu <shangbing.hu@mediatek.com> | 2016-07-12 10:54:26 +0800 |
commit | 87e7deb2d8314dcf793919e67e9e2c25fa701daf (patch) | |
tree | bb65b7b4186aec346fa559c487f3178ecfdd6547 /sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h | |
parent | bed9e1b6f66679b51143ca11426f8c6253851922 (diff) |
[ALPS02199398] sound: audio low latency patch
[Detail]
- add new pcm (DL2) for audio low latency
- only use DRAM
- add protect for multi-output
- IRQ Enable / Disable
- IRQ Counter (normal mixer & fast mixer share IRQ)
- echo reference add path of new pcm
- playbacks underflow detect move out interrupt routing
[Solution]
- add new pcm (DL2) for audio low latency
- only use DRAM
- add protect for multi-output
- IRQ Enable / Disable
- IRQ Counter (normal mixer & fast mixer share IRQ)
- echo reference add path of new pcm
- playbacks underflow detect move out interrupt routing
[Feature] Audio Playback(*)
MTK-Commit-Id: 5b9fea621663d49eafcda5e23f0d8266a329dcbd
Change-Id: Ifa2442060ea6629803ac0f1a1ec3985a328a7853
Signed-off-by: Shangbing Hu <shangbing.hu@mediatek.com>
CR-Id: ALPS02199398
Diffstat (limited to 'sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h')
-rw-r--r-- | sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h b/sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h index fc9e82d18421..0057881c7fa5 100644 --- a/sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h +++ b/sound/soc/mediatek/mt_soc_audio_v3/mt_soc_afe_control.h @@ -113,6 +113,7 @@ bool Set2ndI2SInEnable(bool bEnable); bool SetI2SASRCConfig(bool bIsUseASRC, unsigned int dToSampleRate); bool SetI2SASRCEnable(bool bEnable); +bool checkDllinkMEMIfStatus(void); bool checkUplinkMEMIfStatus(void); bool SetMemIfFetchFormatPerSample(uint32 InterfaceType, uint32 eFetchFormat); bool SetoutputConnectionFormat(uint32 ConnectionFormat, uint32 Output); @@ -161,6 +162,9 @@ bool ClearMemBlock(Soc_Aud_Digital_Block MemBlock); void Auddrv_Dl1_Spinlock_lock(void); void Auddrv_Dl1_Spinlock_unlock(void); +void Auddrv_Dl2_Spinlock_lock(void); +void Auddrv_Dl2_Spinlock_unlock(void); + void Auddrv_DL1_Interrupt_Handler(void); void Auddrv_DL2_Interrupt_Handler(void); void Auddrv_UL1_Interrupt_Handler(void); @@ -195,6 +199,7 @@ void SetSramState(unsigned int State); unsigned int GetPLaybackSramFullSize(void); unsigned int GetPLaybackSramPartial(void); unsigned int GetPLaybackDramSize(void); +unsigned int GetPLaybackDramLowLatencySize(void); size_t GetCaptureDramSize(void); /* offsetTrimming */ @@ -213,6 +218,8 @@ bool ClrOffloadCbk(Soc_Aud_Digital_Block block, void *offloadstream); unsigned int Align64ByteSize(unsigned int insize); +void AudDrv_checkDLISRStatus(void); + #ifdef CONFIG_OF int GetGPIO_Info(int type, int *pin, int *pinmode); #endif |