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authorVince Bridgers <vbridger@opensource.altera.com>2015-02-12 10:47:33 -0600
committerDavid S. Miller <davem@davemloft.net>2015-02-19 15:23:42 -0500
commita923fc730fdbbf079eadfe2b9a1644971bd95793 (patch)
treedda5119ba0d2f3e2a9c0a724abc76518530ae6bf /drivers/net/ethernet/altera
parenta53c4bf7f27f043564f5bdace12405c54265cb66 (diff)
downloadlinux-a923fc730fdbbf079eadfe2b9a1644971bd95793.tar.gz
net: eth: altera: Change access ports to mdio for all xMII applications
Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 registers. This allows support for GMII, MII, RGMII, and SGMII designs where the external PHY is always accesible through Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible through MDIO phy 0 registers for SGMII applications. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Tested-by: Kai Lin Ng <kailng@altera.com> Tested-by: Dalon Westergreen <dwesterg@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/altera')
-rw-r--r--drivers/net/ethernet/altera/altera_tse_main.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index 760c72c6e2ac..4773d98927cf 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -105,11 +105,11 @@ static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
/* set MDIO address */
csrwr32((mii_id & 0x1f), priv->mac_dev,
- tse_csroffs(mdio_phy0_addr));
+ tse_csroffs(mdio_phy1_addr));
/* get the data */
return csrrd32(priv->mac_dev,
- tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff;
+ tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff;
}
static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
@@ -120,10 +120,10 @@ static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
/* set MDIO address */
csrwr32((mii_id & 0x1f), priv->mac_dev,
- tse_csroffs(mdio_phy0_addr));
+ tse_csroffs(mdio_phy1_addr));
/* write the data */
- csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4);
+ csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4);
return 0;
}