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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2020-04-16 22:54:27 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2020-04-19 17:50:02 +0100
commitdd7de4c0023e7564cabe39d64b2822a522890792 (patch)
treed5fdf54eac7f63a6bbc973a4b504269f726d22e7 /drivers/iio/adc
parent0a2bf9200aeaa8c1dd23ec65af30af3643ace887 (diff)
downloadlinux-dd7de4c0023e7564cabe39d64b2822a522890792.tar.gz
iio: adc: ti-ads8344: properly byte swap value
The first received byte is the MSB, followed by the LSB so the value needs to be byte swapped. Also, the ADC actually has a delay of one clock on the SPI bus. Read three bytes to get the last bit. Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
-rw-r--r--drivers/iio/adc/ti-ads8344.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
index 9a460807d46d..abe4b56c847c 100644
--- a/drivers/iio/adc/ti-ads8344.c
+++ b/drivers/iio/adc/ti-ads8344.c
@@ -29,7 +29,7 @@ struct ads8344 {
struct mutex lock;
u8 tx_buf ____cacheline_aligned;
- u16 rx_buf;
+ u8 rx_buf[3];
};
#define ADS8344_VOLTAGE_CHANNEL(chan, si) \
@@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
udelay(9);
- ret = spi_read(spi, &adc->rx_buf, 2);
+ ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
if (ret)
return ret;
- return adc->rx_buf;
+ return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
}
static int ads8344_read_raw(struct iio_dev *iio,