diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-07-09 18:08:32 +0100 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2015-01-13 17:56:54 +0300 |
| commit | dea0e85c15fa98fad7a1f832b7ec3e566db2638c (patch) | |
| tree | cfabf6fd9d6461e6c0dc9772cbabdc4e1351ac7a /arch | |
| parent | 4127f8412e5811f674e581de4d5ef997f13f6737 (diff) | |
ARM: DT: apq8064: add pci support
This patch adds PCIE support to APQ8064, tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 19 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 47 |
2 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index f41fb39fb57d..1ab6505ee40b 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -1,4 +1,5 @@ #include "qcom-apq8064-v2.0.dtsi" +#include <dt-bindings/gpio/gpio.h> / { model = "Qualcomm APQ8064/IFC6410"; @@ -69,6 +70,24 @@ usb4: usb@12530000 { status = "ok"; }; + + /* on board fixed 3.3v supply */ + v3p3_pcieclk: v3p3-pcieclk { + compatible = "regulator-fixed"; + regulator-name = "PCIE V3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + pci@1b500000 { + status = "ok"; + pcie-clk-supply = <&v3p3_pcieclk>; + avdd-supply = <&pm8921_s3>; + vdd-supply = <&pm8921_lvs6>; + qcom,external-phy-refclk; + reset-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; + }; amba { /* eMMC */ diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index bb7ef92a4d9e..cbc5e7114507 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/soc/qcom,gsbi.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Qualcomm APQ8064"; @@ -316,8 +317,54 @@ regulator-always-on; }; + + pm8921_lvs6: pm8921-lvs6 { + compatible = "qcom,rpm-pm8921-switch"; + reg = <QCOM_RPM_PM8921_LVS6>; + regulator-always-on; + }; + + }; + /* PCIE */ + + pci@1b500000 { + compatible = "qcom,pcie-ipq8064"; + reg = <0x1b500000 0x1000>, <0x1b502000 0x100>, <0x1b600000 0x80>; + reg-names = "base", "elbi", "parf"; + status = "disabled"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + interrupts = <0 35 0x0 + 0 36 0x0 + 0 37 0x0 + 0 38 0x0 + 0 39 0x0 + 0 238 0x0>; + interrupt-names = "irq1", "irq2", "irq3", "irq4", "iqr5", "msi"; + + resets = <&gcc PCIE_ACLK_RESET>, + <&gcc PCIE_HCLK_RESET>, + <&gcc PCIE_POR_RESET>, + <&gcc PCIE_PCI_RESET>, + <&gcc PCIE_PHY_RESET>; + reset-names = "axi", "ahb", "por", "pci", "phy"; + + clocks = <&gcc PCIE_A_CLK>, + <&gcc PCIE_H_CLK>, + <&gcc PCIE_PHY_REF_CLK>; + clock-names = "core", "iface", "phy"; + + ranges = <0x00000000 0 0 0x0ff00000 0 0x00100000 /* configuration space */ + 0x81000000 0 0 0x0fe00000 0 0x00100000 /* downstream I/O */ + 0x82000000 0 0 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ + + }; + + + usb1_phy:phy@12500000 { compatible = "qcom,usb-otg-ci"; reg = <0x12500000 0x400>; |