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authorMax Filippov <jcmvbkbc@gmail.com>2022-03-20 09:40:14 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2022-03-20 09:53:01 -0700
commita3d0245c58f962ee99d4440ea0eaf45fb7f5a5cc (patch)
treed54d47f0b54b445920c3c3de6e0b66eeafeff666 /arch/xtensa/include
parent7dc0eb0b6d9f3e2b6a560a04f86ef065a4531a9f (diff)
xtensa: fix xtensa_wsr always writing 0
The commit cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr") replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr', but variable 'v' in the xtensa_set_sr body shadowed the argument 'v' passed to it, resulting in wrong value written to debug registers. Fix that by removing intermediate variable from the xtensa_set_sr macro body. Cc: stable@vger.kernel.org Fixes: cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr") Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include')
-rw-r--r--arch/xtensa/include/asm/processor.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h
index ba62bbcea160..67ccc3d48c8c 100644
--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -242,8 +242,8 @@ extern unsigned long __get_wchan(struct task_struct *p);
#define xtensa_set_sr(x, sr) \
({ \
- unsigned int v = (unsigned int)(x); \
- __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \
+ __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: \
+ "a"((unsigned int)(x))); \
})
#define xtensa_get_sr(sr) \