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authorBaruch Siach <baruch@tkos.co.il>2013-12-29 11:03:30 +0200
committerMax Filippov <jcmvbkbc@gmail.com>2014-01-15 00:25:14 +0400
commit6cb971114f633a0bf240c20b681d989b45e3ec56 (patch)
tree15d3280cf733e2bda26252e1c01b53943b47bd68 /arch/xtensa/include/asm
parentf8935f307fe46faa1a829a6b76ee95ca9ba67d20 (diff)
downloadlinux-6cb971114f633a0bf240c20b681d989b45e3ec56.tar.gz
xtensa: remap io area defined in device tree
Use the simple-bus node to discover the io area, and remap the cached and bypass io ranges. The parent-bus-address value of the first triplet in the "ranges" property is used. This value is rounded down to the nearest 256MB boundary. The length of the io area is fixed at 256MB; the "ranges" property length value is ignored. Other limitations: (1) only the first simple-bus node is considered, and (2) only the first triplet of the "ranges" property is considered. See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the "ranges" property description. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include/asm')
-rw-r--r--arch/xtensa/include/asm/initialize_mmu.h9
-rw-r--r--arch/xtensa/include/asm/io.h10
-rw-r--r--arch/xtensa/include/asm/vectors.h8
3 files changed, 22 insertions, 5 deletions
diff --git a/arch/xtensa/include/asm/initialize_mmu.h b/arch/xtensa/include/asm/initialize_mmu.h
index a2078a2e5476..600781edc8a3 100644
--- a/arch/xtensa/include/asm/initialize_mmu.h
+++ b/arch/xtensa/include/asm/initialize_mmu.h
@@ -26,6 +26,9 @@
#include <asm/pgtable.h>
#include <asm/vectors.h>
+#define CA_BYPASS (_PAGE_CA_BYPASS | _PAGE_HW_WRITE | _PAGE_HW_EXEC)
+#define CA_WRITEBACK (_PAGE_CA_WB | _PAGE_HW_WRITE | _PAGE_HW_EXEC)
+
#ifdef __ASSEMBLY__
#define XTENSA_HWVERSION_RC_2009_0 230000
@@ -80,8 +83,6 @@
/* Step 2: map 0x40000000..0x47FFFFFF to paddr containing this code
* and jump to the new mapping.
*/
-#define CA_BYPASS (_PAGE_CA_BYPASS | _PAGE_HW_WRITE | _PAGE_HW_EXEC)
-#define CA_WRITEBACK (_PAGE_CA_WB | _PAGE_HW_WRITE | _PAGE_HW_EXEC)
srli a3, a0, 27
slli a3, a3, 27
@@ -124,12 +125,12 @@
witlb a4, a5
movi a5, XCHAL_KIO_CACHED_VADDR + 6
- movi a4, XCHAL_KIO_PADDR + CA_WRITEBACK
+ movi a4, XCHAL_KIO_DEFAULT_PADDR + CA_WRITEBACK
wdtlb a4, a5
witlb a4, a5
movi a5, XCHAL_KIO_BYPASS_VADDR + 6
- movi a4, XCHAL_KIO_PADDR + CA_BYPASS
+ movi a4, XCHAL_KIO_DEFAULT_PADDR + CA_BYPASS
wdtlb a4, a5
witlb a4, a5
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 1482a3636381..2a042d430c25 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -24,6 +24,16 @@
#define IO_SPACE_LIMIT ~0
#ifdef CONFIG_MMU
+
+#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF
+extern unsigned long xtensa_kio_paddr;
+
+static inline unsigned long xtensa_get_kio_paddr(void)
+{
+ return xtensa_kio_paddr;
+}
+#endif
+
/*
* Return the virtual address for the specified bus memory.
* Note that we currently don't support any address outside the KIO segment.
diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h
index 221a60d804d5..5791b45d5a5d 100644
--- a/arch/xtensa/include/asm/vectors.h
+++ b/arch/xtensa/include/asm/vectors.h
@@ -22,9 +22,15 @@
#define XCHAL_KIO_CACHED_VADDR 0xe0000000
#define XCHAL_KIO_BYPASS_VADDR 0xf0000000
-#define XCHAL_KIO_PADDR 0xf0000000
+#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
#define XCHAL_KIO_SIZE 0x10000000
+#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF
+#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
+#else
+#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
+#endif
+
#if defined(CONFIG_MMU)
/* Will Become VECBASE */