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authorHarry Pan <harry.pan@intel.com>2020-04-02 19:07:09 +0800
committerBorislav Petkov <bp@suse.de>2020-04-22 21:43:12 +0200
commit5b16ef2e43ffa1be596652d992235b1cbb244935 (patch)
treef7b2dfb463c1e337ee28c039447734356d92ccd9 /arch/x86/events
parentae83d0b416db002fe95601e7f97f64b59514d936 (diff)
downloadlinux-5b16ef2e43ffa1be596652d992235b1cbb244935.tar.gz
perf/x86/cstate: Add Jasper Lake CPU support
The Jasper Lake processor is Tremont microarchitecture, reuse the glm_cstates table of Goldmont and Goldmont Plus to enable the C-states residency profiling. Signed-off-by: Harry Pan <harry.pan@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200402190658.1.Ic02e891daac41303aed1f2fc6c64f6110edd27bd@changeid
Diffstat (limited to 'arch/x86/events')
-rw-r--r--arch/x86/events/intel/cstate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index e4aa20c0426f..442e1ed4acd4 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -643,6 +643,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),