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authorVincent Chen <vincent.chen@sifive.com>2021-04-29 00:58:36 -0700
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-05-06 09:40:13 -0700
commit0e0d4992517fba81ecbceb5b71d2851f1208a02b (patch)
tree8cec67f63e9caf3ce40fbaef266476eefb22c3aa /arch/riscv
parent8db6f937f4e76d9dd23795311fc14f0a5c0ac119 (diff)
riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y
The corresponding hardware issues of CONFIG_ERRATA_SIFIVE_CIP_453 and CONFIG_ERRATA_SIFIVE_CIP_1200 only exist in the SiFive 64bit CPU cores. Therefore, these two errata are required only if CONFIG_64BIT=y Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Fixes: bff3ff525460 ("riscv: sifive: Apply errata "cip-1200" patch") Fixes: 800149a77c2c ("riscv: sifive: Apply errata "cip-453" patch") Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/Kconfig.erratas4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas
index d5d03ae8d685..b44d6ecdb46e 100644
--- a/arch/riscv/Kconfig.erratas
+++ b/arch/riscv/Kconfig.erratas
@@ -21,7 +21,7 @@ config ERRATA_SIFIVE
config ERRATA_SIFIVE_CIP_453
bool "Apply SiFive errata CIP-453"
- depends on ERRATA_SIFIVE
+ depends on ERRATA_SIFIVE && 64BIT
default y
help
This will apply the SiFive CIP-453 errata to add sign extension
@@ -32,7 +32,7 @@ config ERRATA_SIFIVE_CIP_453
config ERRATA_SIFIVE_CIP_1200
bool "Apply SiFive errata CIP-1200"
- depends on ERRATA_SIFIVE
+ depends on ERRATA_SIFIVE && 64BIT
default y
help
This will apply the SiFive CIP-1200 errata to repalce all