path: root/arch/riscv/include/asm/pgtable.h
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authorChristoph Hellwig <hch@lst.de>2019-08-13 11:27:56 +0200
committerChristoph Hellwig <hch@lst.de>2019-11-11 21:18:20 +0100
commit38af57825313f6c9404b42c4e4fa22311f60383a (patch)
tree024d79648181663339e4a8d521ef7f561cacb2f2 /arch/riscv/include/asm/pgtable.h
parent80b0ca98f91ddbc09828aff5a00af1c73837713e (diff)
riscv: use the generic ioremap code
Use the generic ioremap code instead of providing a local version. Note that this relies on the asm-generic no-op definition of pgprot_noncached. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com> Tested-by: Paul Walmsley <paul.walmsley@sifive.com> # rv32, rv64 boot Acked-by: Paul Walmsley <paul.walmsley@sifive.com> # arch/riscv
Diffstat (limited to 'arch/riscv/include/asm/pgtable.h')
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index d3221017194d..d51ce5ac20bd 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -62,6 +62,12 @@
#define PAGE_TABLE __pgprot(_PAGE_TABLE)
+ * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
+ * change the properties of memory regions.
+ */
extern pgd_t swapper_pg_dir[];
/* MAP_PRIVATE permissions: xwr (copy-on-write) */