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authorLoys Ollivier <lollivier@baylibre.com>2019-06-27 16:27:57 -0700
committerPaul Walmsley <paul.walmsley@sifive.com>2019-07-01 13:20:05 -0700
commitbbc5dc5155aad9ba50eeda955c591549d761c1db (patch)
tree0f37fc9289f7ce63be0a0b8c532759aa06526ba3 /arch/riscv/configs
parentedb7f21c3aece6ef24f15ff4d22cceec4a339aac (diff)
downloadlinux-bbc5dc5155aad9ba50eeda955c591549d761c1db.tar.gz
riscv: defconfig: enable SOC_SIFIVE
Enable SOC_SIFIVE so the default upstream config is bootable on the SiFive Unleashed Board. And have basic support for future boards based on the same SoC. Signed-off-by: Loys Ollivier <lollivier@baylibre.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> [paul.walmsley@sifive.com: updated to apply] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv/configs')
-rw-r--r--arch/riscv/configs/defconfig6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 87cb6d13e868..b7b749b18853 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_BPF_SYSCALL=y
+CONFIG_SOC_SIFIVE=y
CONFIG_SMP=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
@@ -51,8 +52,6 @@ CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
-CONFIG_SERIAL_SIFIVE=y
-CONFIG_SERIAL_SIFIVE_CONSOLE=y
CONFIG_HVC_RISCV_SBI=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_DRM=y
@@ -68,9 +67,6 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
CONFIG_VIRTIO_MMIO=y
-CONFIG_CLK_SIFIVE=y
-CONFIG_CLK_SIFIVE_FU540_PRCI=y
-CONFIG_SIFIVE_PLIC=y
CONFIG_SPI_SIFIVE=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y