diff options
| author | Vincent Pelletier <plr.vincent@gmail.com> | 2021-11-16 23:57:37 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2021-12-16 21:27:14 -0800 |
| commit | ea81b91e4e256b0bb75d47ad3a5c230b2171a005 (patch) | |
| tree | 3f7efd8ee7d3e1de2940a8a9568d5d2d8db170e6 /arch/riscv/boot/dts | |
| parent | 298d03c2d7f1b5daacb6d4f4053fd3d677d67087 (diff) | |
riscv: dts: sifive unmatched: Name gpio lines
Follow the pin descriptions given in the version 3 of the board schematics.
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/boot/dts')
| -rw-r--r-- | arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts index 3c796d64cf51..f8648ee1785a 100644 --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts @@ -247,4 +247,8 @@ &gpio { status = "okay"; + gpio-line-names = "J29.1", "PMICNTB", "PMICSHDN", "J8.1", "J8.3", + "PCIe_PWREN", "THERM", "UBRDG_RSTN", "PCIe_PERSTN", + "ULPI_RSTN", "J8.2", "UHUB_RSTN", "GEMGXL_RST", "J8.4", + "EN_VDD_SD", "SD_CD"; }; |