diff options
| author | Christoph Hellwig <hch@lst.de> | 2018-04-27 08:43:14 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2018-05-19 08:46:26 +0200 |
| commit | 10314e09d044296bc50dec831aa85b3ae1acedf0 (patch) | |
| tree | 2d6dd79cb00f3797e5f92afd90589803b64b1842 /arch/riscv/Kconfig | |
| parent | f1306f0423ec02a1da31bab34006323fcadf2e06 (diff) | |
riscv: add swiotlb support
All RISC-V platforms today lack an IOMMU. However, legacy PCI devices
sometimes require DMA-memory to be in the low 32 bits. To make this work,
we enable the software-based bounce buffers from swiotlb. They only impose
overhead when the device in question cannot address the full 64-bit address
space, so a perfect fit.
This patch assumes that DMA is coherent with the processor and the PCI
bus. It also assumes that the processor and devices share a common
address space. This is true for all RISC-V platforms so far.
[changelog stolen from an earlier patch by Palmer Dabbelt that did the
more complicated swiotlb wireup before the recent consolidation]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/Kconfig')
| -rw-r--r-- | arch/riscv/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c4488ce8c2fa..274bc064c41f 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -114,6 +114,7 @@ config ARCH_RV64I select HAVE_FTRACE_MCOUNT_RECORD select HAVE_DYNAMIC_FTRACE select HAVE_DYNAMIC_FTRACE_WITH_REGS + select SWIOTLB endchoice |