diff options
| author | Pramod Gurav <pramod.gurav@smartplayin.com> | 2014-12-08 17:29:37 +0530 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2015-01-13 17:57:01 +0300 |
| commit | eae46775110d7b0b4d8b5e04276ce04d6b3636e8 (patch) | |
| tree | 64c4a62bbc4bd793c7e8ff16947439b4697dfc09 /arch/arm | |
| parent | dcdc762a0f20ddde93a36c81002ead18c9708439 (diff) | |
ARM: dts: qcom: Add DT support for GSBI6 and for UART pin mux
This change adds DT support for GSBI6 and muxes the gpio pins
as UART lines. Also defines a alias for serial port on these lines.
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 20 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 21 |
2 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 8d58197652c9..786fa199a668 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -7,6 +7,7 @@ aliases { serial0 = &serial0; + serial1 = &serial1; }; soc { @@ -18,6 +19,13 @@ }; }; + uart_pins: uart_pins { + mux { + pins = "gpio14", "gpio15", "gpio16", "gpio17"; + function = "gsbi6"; + }; + }; + card_detect: card_detect { mux { pins = "gpio26"; @@ -45,6 +53,18 @@ }; }; + gsbi@16500000 { + status = "ok"; + qcom,mode = <GSBI_PROT_I2C_UART>; + + serial@16540000 { + status = "ok"; + + pinctrl-names = "default"; + pinctrl-0 = <&uart_pins>; + }; + }; + gsbi@16600000 { status = "ok"; qcom,mode = <GSBI_PROT_I2C_UART>; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 7ba3a727dad0..5af451ccaa19 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -488,6 +488,27 @@ }; }; + gsbi6: gsbi@16500000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16500000 0x03>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + serial1: serial@16540000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16540000 0x100>, + <0x16500000 0x03>; + interrupts = <0 156 0x0>; + clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; |