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| author | Daniel Thompson <daniel.thompson@linaro.org> | 2016-08-19 15:53:40 +0100 |
|---|---|---|
| committer | Daniel Thompson <daniel.thompson@linaro.org> | 2017-03-29 17:02:04 +0100 |
| commit | a46a7b3a63c940a31261204180c24432eced16be (patch) | |
| tree | 452518a72fe1b96ae8e1f7434271839cefbc6bbc /arch/arm64/kernel/smp.c | |
| parent | 0df3e2b7ba9f323aee91bfb9d862899f08dd785c (diff) | |
arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIs
Recently arm64 gained the capability to (optionally) mask interrupts
using the GIC PMR rather than the CPU PSR. That allows us to introduce
an NMI-like means to handle backtrace requests.
This provides a useful debug aid by allowing the kernel to robustly show
a backtrace for every processor in the system when, for example, we hang
trying to acquire a spin lock.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Diffstat (limited to 'arch/arm64/kernel/smp.c')
| -rw-r--r-- | arch/arm64/kernel/smp.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index a0a06580bcef..1f87a44d0847 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -899,6 +899,13 @@ void handle_IPI(int ipinr, struct pt_regs *regs) #endif case IPI_CPU_BACKTRACE: + BUILD_BUG_ON(SMP_IPI_NMI_MASK != BIT(IPI_CPU_BACKTRACE)); + + if (in_nmi()) { + nmi_cpu_backtrace(regs); + break; + } + printk_nmi_enter(); irq_enter(); nmi_cpu_backtrace(regs); |