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authorVeena Sambasivan <veenas@codeaurora.org>2016-08-12 18:59:27 -0700
committerPat Tjin <pattjin@google.com>2016-08-19 19:07:07 +0000
commit46993fc79cdeb29d003b8218866d2742cb269f5d (patch)
treedc68770aada06af92e5831b83b98adee6d687f40 /arch/arm64/include/asm
parent5ad5fa938be930c9e209c22c9241925046775a28 (diff)
perf: arm64: implement CPU_PM notifier
When a CPU is suspended (either through suspend-to-RAM or CPUidle), its PMU registers content can be lost, which means that counters registers value that were initialized on power down entry have to be reprogrammed on power-up to make sure the counters set-up is preserved (ie on power-up registers take the reset values on Cold or Warm reset, which can be architecturally UNKNOWN). To guarantee seamless profiling conditions across a core power down this patch adds a CPU PM notifier to ARM pmus, that upon CPU PM entry/exit from low-power states saves/restores the pmu registers set-up (by using the ARM perf API), so that the power-down/up cycle does not affect the perf behaviour (apart from a black-out period between power-up/down CPU PM notifications that is unavoidable). (cherry-picked from angler kernel) Bug: 30839193 Change-Id: I0775acc020b5aa8eb79150498e342263c4429d2d
Diffstat (limited to 'arch/arm64/include/asm')
-rw-r--r--arch/arm64/include/asm/pmu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/pmu.h b/arch/arm64/include/asm/pmu.h
index c9816daf85e0..48c59086aed2 100644
--- a/arch/arm64/include/asm/pmu.h
+++ b/arch/arm64/include/asm/pmu.h
@@ -67,6 +67,8 @@ struct arm_pmu {
u64 max_period;
struct platform_device *plat_device;
struct pmu_hw_events *(*get_hw_events)(void);
+ struct notifier_block hotplug_nb;
+ struct notifier_block cpu_pm_nb;
int (*check_event)(
struct arm_pmu *armpmu,
struct hw_perf_event *hwc);