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authorDaniel Thompson <daniel.thompson@linaro.org>2016-08-19 15:53:40 +0100
committerDaniel Thompson <daniel.thompson@linaro.org>2017-03-29 17:02:04 +0100
commita46a7b3a63c940a31261204180c24432eced16be (patch)
tree452518a72fe1b96ae8e1f7434271839cefbc6bbc /arch/arm64/include/asm/smp.h
parent0df3e2b7ba9f323aee91bfb9d862899f08dd785c (diff)
arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIs
Recently arm64 gained the capability to (optionally) mask interrupts using the GIC PMR rather than the CPU PSR. That allows us to introduce an NMI-like means to handle backtrace requests. This provides a useful debug aid by allowing the kernel to robustly show a backtrace for every processor in the system when, for example, we hang trying to acquire a spin lock. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Diffstat (limited to 'arch/arm64/include/asm/smp.h')
-rw-r--r--arch/arm64/include/asm/smp.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h
index d050d720a1b4..dc00c0056868 100644
--- a/arch/arm64/include/asm/smp.h
+++ b/arch/arm64/include/asm/smp.h
@@ -35,6 +35,8 @@
#include <linux/cpumask.h>
#include <linux/thread_info.h>
+#define SMP_IPI_NMI_MASK (1 << 6)
+
DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
/*