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| author | Daniel Thompson <daniel.thompson@linaro.org> | 2015-09-11 16:13:16 +0100 |
|---|---|---|
| committer | Daniel Thompson <daniel.thompson@linaro.org> | 2016-06-17 17:03:46 +0100 |
| commit | 41d10cf0b562e8c680101b8b3972982a06ed5b0e (patch) | |
| tree | 9e49fd0f72db828c4dfe7183938c1e38b64c232f /arch/arm64/include/asm/assembler.h | |
| parent | 172bf4147ef51b277f9518bdb4f76f2dab6831b0 (diff) | |
arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIsdev/arm64_nmi-v4.7-rc3
Recently arm64 gained the capability to (optionally) mask interrupts
using the GIC PMR rather than the CPU PSR. That allows us to introduce
an NMI-like means to handle backtrace requests.
This provides a useful debug aid by allowing the kernel to robustly show
a backtrace for every processor in the system when, for example, we hang
trying to acquire a spin lock.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Diffstat (limited to 'arch/arm64/include/asm/assembler.h')
| -rw-r--r-- | arch/arm64/include/asm/assembler.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 9e7517301e5f..aec5b7761526 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -33,6 +33,29 @@ #include <asm/thread_info.h> /* + * Enable and disable pseudo NMI. + */ + .macro disable_nmi +#ifdef CONFIG_USE_ICC_SYSREGS_FOR_IRQFLAGS +alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF + nop +alternative_else + msr daifset, #2 +alternative_endif +#endif + .endm + + .macro enable_nmi +#ifdef CONFIG_USE_ICC_SYSREGS_FOR_IRQFLAGS +alternative_if_not ARM64_HAS_SYSREG_GIC_CPUIF + nop +alternative_else + msr daifclr, #2 +alternative_endif +#endif + .endm + +/* * Enable and disable interrupts. */ .macro disable_irq, tmp |