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authorMaxime COQUELIN <maxime.coquelin@st.com>2013-11-06 09:25:14 +0100
committerSrinivas Kandagatla <srinivas.kandagatla@st.com>2013-12-04 09:00:18 +0000
commit5bbb75273f3f26392d82acdfc2cde8c34f51033b (patch)
tree656b0a253d31aba56ec95dd8d53236be2b6bac41 /arch/arm/boot/dts/stih415-pinctrl.dtsi
parentf53e99a9b4f09fe39336547c7a6a9e1cb7a25907 (diff)
ARM: STi: Supply I2C configuration to STiH415 SoC
This patch supplies I2C configuration to STiH415 SoC. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih415-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/stih415-pinctrl.dtsi36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi
index 1d322b24d1e4..e56449d41481 100644
--- a/arch/arm/boot/dts/stih415-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi
@@ -86,6 +86,24 @@
};
};
};
+
+ sbc_i2c0 {
+ pinctrl_sbc_i2c0_default: sbc_i2c0-default {
+ st,pins {
+ sda = <&PIO4 6 ALT1 BIDIR>;
+ scl = <&PIO4 5 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ sbc_i2c1 {
+ pinctrl_sbc_i2c1_default: sbc_i2c1-default {
+ st,pins {
+ sda = <&PIO3 2 ALT2 BIDIR>;
+ scl = <&PIO3 1 ALT2 BIDIR>;
+ };
+ };
+ };
};
pin-controller-front {
@@ -143,6 +161,24 @@
reg = <0x7000 0x100>;
st,bank-name = "PIO12";
};
+
+ i2c0 {
+ pinctrl_i2c0_default: i2c0-default {
+ st,pins {
+ sda = <&PIO9 3 ALT1 BIDIR>;
+ scl = <&PIO9 2 ALT1 BIDIR>;
+ };
+ };
+ };
+
+ i2c1 {
+ pinctrl_i2c1_default: i2c1-default {
+ st,pins {
+ sda = <&PIO12 1 ALT1 BIDIR>;
+ scl = <&PIO12 0 ALT1 BIDIR>;
+ };
+ };
+ };
};
pin-controller-rear {