aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/stih415-clock.dtsi
diff options
context:
space:
mode:
authorSrinivas Kandagatla <srinivas.kandagatla@st.com>2013-06-25 12:15:10 +0100
committerOlof Johansson <olof@lixom.net>2013-06-25 13:26:47 -0700
commit65ebcc1158891c8c0abef726d59a7840454ad25d (patch)
tree9907cd1af2d7f679f2b6a5a1192b2ff5df7f11c9 /arch/arm/boot/dts/stih415-clock.dtsi
parent317ddd256b9c24b0d78fa8018f80f1e495481a10 (diff)
downloadlinux-65ebcc1158891c8c0abef726d59a7840454ad25d.tar.gz
ARM: sti: Add STiH415 SOC support
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/stih415-clock.dtsi')
-rw-r--r--arch/arm/boot/dts/stih415-clock.dtsi38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415-clock.dtsi b/arch/arm/boot/dts/stih415-clock.dtsi
new file mode 100644
index 000000000000..174c799df741
--- /dev/null
+++ b/arch/arm/boot/dts/stih415-clock.dtsi
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2013 STMicroelectronics (R&D) Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/ {
+ clocks {
+ /*
+ * Fixed 30MHz oscillator input to SoC
+ */
+ CLK_SYSIN: CLK_SYSIN {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <30000000>;
+ };
+
+ /*
+ * ARM Peripheral clock for timers
+ */
+ arm_periph_clk: arm_periph_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <500000000>;
+ };
+
+ /*
+ * Bootloader initialized system infrastructure clock for
+ * serial devices.
+ */
+ CLKS_ICN_REG_0: CLKS_ICN_REG_0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ };
+ };
+};