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authorSimon Horman <horms+renesas@verge.net.au>2013-04-03 10:49:18 +0900
committerSimon Horman <horms+renesas@verge.net.au>2013-04-03 10:49:18 +0900
commiteb0ae7280939fda741ad6ae9b108725517652f56 (patch)
treeaf0a7387d7f9424a3b7bd2c1a065d4433a76270b /arch/arm/boot/dts/sh73a0.dtsi
parentac22dde76c80a3ffa3c3c24cf16bb8076b20b767 (diff)
parent202ac6a21a79500ef5aab4cd8665be2597e9345c (diff)
Merge tag 'renesas-pinmux2-for-v3.10' into boards-base
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 This merge is made to supply run-time dependencies for the following patches that will bea added on top: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support
Diffstat (limited to 'arch/arm/boot/dts/sh73a0.dtsi')
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi81
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 3e4d383ac6d9..ec40bf78289e 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -38,6 +38,87 @@
<0xf0000100 0x100>;
};
+ irqpin0: irqpin@e6900000 {
+ compatible = "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900000 4>,
+ <0xe6900010 4>,
+ <0xe6900020 1>,
+ <0xe6900040 1>,
+ <0xe6900060 1>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 1 0x4
+ 0 2 0x4
+ 0 3 0x4
+ 0 4 0x4
+ 0 5 0x4
+ 0 6 0x4
+ 0 7 0x4
+ 0 8 0x4>;
+ };
+
+ irqpin1: irqpin@e6900004 {
+ compatible = "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900004 4>,
+ <0xe6900014 4>,
+ <0xe6900024 1>,
+ <0xe6900044 1>,
+ <0xe6900064 1>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 9 0x4
+ 0 10 0x4
+ 0 11 0x4
+ 0 12 0x4
+ 0 13 0x4
+ 0 14 0x4
+ 0 15 0x4
+ 0 16 0x4>;
+ control-parent;
+ };
+
+ irqpin2: irqpin@e6900008 {
+ compatible = "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe6900008 4>,
+ <0xe6900018 4>,
+ <0xe6900028 1>,
+ <0xe6900048 1>,
+ <0xe6900068 1>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 17 0x4
+ 0 18 0x4
+ 0 19 0x4
+ 0 20 0x4
+ 0 21 0x4
+ 0 22 0x4
+ 0 23 0x4
+ 0 24 0x4>;
+ };
+
+ irqpin3: irqpin@e690000c {
+ compatible = "renesas,intc-irqpin";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xe690000c 4>,
+ <0xe690001c 4>,
+ <0xe690002c 1>,
+ <0xe690004c 1>,
+ <0xe690006c 1>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 25 0x4
+ 0 26 0x4
+ 0 27 0x4
+ 0 28 0x4
+ 0 29 0x4
+ 0 30 0x4
+ 0 31 0x4
+ 0 32 0x4>;
+ };
+
i2c0: i2c@0xe6820000 {
#address-cells = <1>;
#size-cells = <0>;