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authorPeng Ma <peng.ma@nxp.com>2019-01-10 10:46:41 +0800
committerDaniel Thompson <daniel@redfelineninja.org.uk>2019-09-17 16:03:00 +0100
commitf5c552b41b79019c7d81569b24f6843fcc37cf6b (patch)
tree056c32618a191fb7897becb512e88c9c3dc1b42b
parent358577f78b3a9821f8a1e7975cb5098fff167469 (diff)
downloadlinux-f5c552b41b79019c7d81569b24f6843fcc37cf6b.tar.gz
arm64: dts: lx2160: update sata node
Fix the sata ecc register address error. Signed-off-by: Peng Ma <peng.ma@nxp.com>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 3d2f987181a6..d5c3535705b1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -1081,7 +1081,9 @@
sata0: sata@3200000 {
status = "disabled";
compatible = "fsl,lx2160a-ahci";
- reg = <0x0 0x3200000 0x0 0x10000>;
+ reg = <0x0 0x3200000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
dma-coherent;
@@ -1090,7 +1092,9 @@
sata1: sata@3210000 {
status = "disabled";
compatible = "fsl,lx2160a-ahci";
- reg = <0x0 0x3210000 0x0 0x10000>;
+ reg = <0x0 0x3210000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
dma-coherent;
@@ -1099,7 +1103,9 @@
sata2: sata@3220000 {
status = "disabled";
compatible = "fsl,lx2160a-ahci";
- reg = <0x0 0x3220000 0x0 0x10000>;
+ reg = <0x0 0x3220000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
dma-coherent;
@@ -1108,7 +1114,9 @@
sata3: sata@3230000 {
status = "disabled";
compatible = "fsl,lx2160a-ahci";
- reg = <0x0 0x3230000 0x0 0x10000>;
+ reg = <0x0 0x3230000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
dma-coherent;