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authorRabeeh Khoury <rabeeh@solid-run.com>2019-07-28 14:21:06 +0300
committerDaniel Thompson <daniel@redfelineninja.org.uk>2019-09-17 16:03:07 +0100
commit24792672f1c0b662847f69b4954bf15a758e4cc8 (patch)
treeb7d7ca7a42be4393a4e255828c69d0c364f7d641
parentbc70527f14b8d2be68ff7a1548f7d81afc01b29b (diff)
downloadlinux-24792672f1c0b662847f69b4954bf15a758e4cc8.tar.gz
arm64: dts: lx2160a: add lx2160acex7 device tree
The device tree enables the following features - 1. dpmac17 RGMII MAC connected to Atheros AR8035 phy 2. 2x MDIO busses 3. 2x USB 3.0 controllers 4. 4x SATA ports 5. MT35X 512Mb SPI flash 6. Temperature sensor on i2c0 channel 3 7. AMC6821 temperature and PWM fan controller The module supports AMC6821 and EMC2301 PWM controllers where either can be assembled, but not both together since the PWM and TACH signals are shared between them. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts190
1 files changed, 190 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
new file mode 100644
index 000000000000..872fcf9e724d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2160A-CEx7
+//
+// Copyright 2019 SolidRun ltd.
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "SolidRun LX2160A COM express type 7 module";
+ compatible = "fsl,lx2160a-cex7", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "RT7290";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&esdhc0 {
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
+ status = "okay";
+};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+ status = "okay";
+};
+
+
+/*
+i2c busses are -
+/dev/i2c0 - CTRL #0 - connected to PCA9547 I2C switch
+/dev/i2c1 - CTRL #2 - COM module to carrier (general I2C_CK/I2C_DAT)
+/dev/i2c2 - CTRL #4 - Connected to RTC PCF2129AT (0x51), EEPROM (0x54,0x55,0x56,0x57)
+
+I2C switch -
+/dev/i2c3 - CH0 - SO-DIMMs SPD (0x51, 0x53), 2Kb EEPROM (0x57), bootable 512Kb eeprom (0x50)
+/dev/i2c4 - CH1 - 100MHz clk gen (address 0x6a)
+/dev/i2c5 - CH2 - LTC3882 DC-DC controller on 0x63
+/dev/i2c6 - CH3 - SA56004ED (0x4c), SA56004FD (0x4d), COM module SMB_CK,SMB_DAT and COM module 10G_LED_SDA,10G_LED_SCL
+/dev/i2c7 - CH4 - SFP #0 I2C
+/dev/i2c8 - CH5 - SFP #1 I2C
+/dev/i2c9 - CH6 - SFP #2 I2C
+/dev/i2c10 - CH7 - SFP #3 I2C
+
+
+*/
+
+
+
+&i2c0 {
+ status = "okay";
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ fan-temperature-ctrlr@18 {
+ compatible = "ti,amc6821";
+ reg = <0x18>;
+ cooling-min-state = <0>;
+ cooling-max-state = <9>;
+ #cooling-cells = <2>;
+ };
+ };
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ temperature-sensor@48 {
+ compatible = "nxp,sa56004";
+ reg = <0x48>;
+ vcc-supply = <&sb_3v3>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ // IRQ10_B
+ interrupts = <0 150 0x4>;
+ };
+};
+
+&fspi {
+ status = "okay";
+ flash0: mt35xu512aba@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,m25p80";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&emdio1 {
+ status = "okay";
+ rgmii_phy1: ethernet-phy@1 {
+ /* AR8035 PHY - "compatible" property not strictly needed */
+ compatible = "ethernet-phy-id004d.d072";
+ reg = <0x1>;
+ /* Poll mode - no "interrupts" property defined */
+ };
+};
+
+&emdio2 {
+ status = "okay";
+};
+
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};