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authorTuomas Tynkkynen <ttynkkynen@nvidia.com>2014-05-16 16:50:20 +0300
committerMike Turquette <mturquette@linaro.org>2014-05-16 15:49:23 -0700
commitd2c834abe2b39a2d5a6c38ef44de87c97cbb34b4 (patch)
tree0b481e0a303d60d3f79d8bf0333b1168b4a24b6d
parent8e33f91a0b84ae1964bef77cb92f5d41d97530c8 (diff)
downloadlinux-d2c834abe2b39a2d5a6c38ef44de87c97cbb34b4.tar.gz
clk: tegra: Fix wrong value written to PLLE_AUX
The value written to PLLE_AUX was incorrect due to a wrong variable being used. Without this fix SATA does not work. Cc: stable@vger.kernel.org Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved changelog]
-rw-r--r--drivers/clk/tegra/clk-pll.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 0d20241e0770..e1769addf435 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -1718,7 +1718,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name,
"pll_re_vco");
} else {
val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL);
- pll_writel(val, pll_params->aux_reg, pll);
+ pll_writel(val_aux, pll_params->aux_reg, pll);
}
clk = _tegra_clk_register_pll(pll, name, parent_name, flags,