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authorBjorn Helgaas <bhelgaas@google.com>2015-12-01 10:41:47 -0600
committerHelge Deller <deller@gmx.de>2015-12-12 16:07:35 +0100
commit5f0e9b4c301742c860b8aedc3e7c471d4a611043 (patch)
treedaf6965e01ac65090b4a8e2643941b4798b7c06b
parente46e31a3696ae2d66f32c207df3969613726e636 (diff)
downloadlinux-5f0e9b4c301742c860b8aedc3e7c471d4a611043.tar.gz
parisc: Remove unused pcibios_init_bus()
There are no callers of pcibios_init_bus(), so remove it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Helge Deller <deller@gmx.de>
-rw-r--r--arch/parisc/kernel/pci.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 64f2764a8cef..c99f3dde455c 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -171,24 +171,6 @@ void pcibios_set_master(struct pci_dev *dev)
}
-void __init pcibios_init_bus(struct pci_bus *bus)
-{
- struct pci_dev *dev = bus->self;
- unsigned short bridge_ctl;
-
- /* We deal only with pci controllers and pci-pci bridges. */
- if (!dev || (dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
- return;
-
- /* PCI-PCI bridge - set the cache line and default latency
- (32) for primary and secondary buses. */
- pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 32);
-
- pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bridge_ctl);
- bridge_ctl |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR;
- pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl);
-}
-
/*
* pcibios align resources() is called every time generic PCI code
* wants to generate a new address. The process of looking for