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authorDaniel Lezcano <daniel.lezcano@linaro.org>2019-08-01 16:08:06 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2019-10-28 15:46:53 +0100
commit0376d2551c4ee0b12d2af5bb870643df93354691 (patch)
treec7538972743893770f87b55eb6e6a7c99845b770
parenta5feb417da965d0327be53b83648f32910ec3312 (diff)
ARM64: hisilicon: hi6220: DT: Add trip point and idle cooling devicethermal/idle-cooling
Add a trip point above the one mitigated by cpufreq and the associated idle cooling device. That allows to catch situation where the cpufreq does not succeed to mitigate the temperature and where the idle injection takes over to force CPU power down. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 108e2a4227f6..e327c9c1742b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -67,6 +67,7 @@
entry-latency-us = <700>;
exit-latency-us = <250>;
min-residency-us = <1000>;
+ #cooling-cells = <2>; /* min followed by max */
};
CLUSTER_SLEEP: cluster-sleep {
@@ -77,6 +78,7 @@
exit-latency-us = <700>;
min-residency-us = <2700>;
wakeup-latency-us = <1500>;
+ #cooling-cells = <2>; /* min followed by max */
};
};
@@ -890,6 +892,13 @@
hysteresis = <0>;
type = "passive";
};
+
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
};
cooling-maps {
@@ -904,6 +913,10 @@
<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
+ map1 {
+ trip = <&hot>;
+ cooling-device = <&CPU_SLEEP THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
};
};
};