diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2012-12-01 00:29:17 +0400 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2012-12-01 00:29:24 +0400 |
| commit | b094e87525ee4e42777bcca1d8369aed232a377a (patch) | |
| tree | 949b92b1736c6eb23548092fb1c107969bb4fb63 | |
| parent | 1d5f527a245b2081342b5b5ec6eac09160bf4e63 (diff) | |
clk: ux500: fix bit errortracking-llct-v3.7-misc-fixes-llct-20121205.0tracking-llct-v3.7-misc-fixes-llct-20121201.0
This fixes a bit error in the U8500 clock implementation: the
unused p2_pclk12 registered at bit 12 in periphereral group 6
was defined as using bit 11 rather than bit 12.
When walking over and disabling the unused clocks in the tree
at late init time, p2_pclk12 was disabled, by effectively
clearing the but for p2_pclk11 instead of bit 12 as it should
have, thus disabling gpio block 6 and 7.
Reported-by: Lee Jones <lee.jones@linaro.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Philippe Begnic <philippe.begnic@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | drivers/clk/ux500/u8500_clk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index e2c17d187d98..6939009521f8 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -323,7 +323,7 @@ void u8500_clk_init(void) clk_register_clkdev(clk, NULL, "gpioblock1"); clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE, - BIT(11), 0); + BIT(12), 0); clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE, BIT(0), 0); |