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authorPat Tjin <pattjin@google.com>2016-10-12 22:12:51 +0000
committerPat Tjin <pattjin@google.com>2016-10-12 22:16:05 +0000
commita0ce33daf6946ce83de783e09066d0d5a879dabd (patch)
tree6f165ee4ca1c315986e2865af48bd3cb628814b0
parent0a55e45c5749367b8c88d004b3d118bc57a39d5c (diff)
Revert "Revert "msm: kgsl: Clear the interrupt immediately""android-7.1.0_r0.3
This reverts commit 9236e1d0b9c407aa02fcbbac10267690f66ad56a. Change-Id: Ifd7609c8077832850ad94e59d959f9411e2440c9
-rw-r--r--drivers/gpu/msm/adreno.c18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 471b62d420fb..886043c91147 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -593,6 +593,15 @@ static irqreturn_t adreno_irq_handler(struct kgsl_device *device)
adreno_readreg(adreno_dev, ADRENO_REG_RBBM_INT_0_STATUS, &status);
+ /*
+ * Clear all the interrupt bits but A5XX_INT_RBBM_AHB_ERROR. Because
+ * even if we clear it here, it will stay high until it is cleared
+ * in its respective handler. Otherwise, the interrupt handler will
+ * fire again.
+ */
+ adreno_writereg(adreno_dev, ADRENO_REG_RBBM_INT_CLEAR_CMD,
+ status & ~BIT(A5XX_INT_RBBM_AHB_ERROR));
+
/* Loop through all set interrupts and call respective handlers */
for (tmp = status; tmp != 0;) {
i = fls(tmp) - 1;
@@ -611,9 +620,14 @@ static irqreturn_t adreno_irq_handler(struct kgsl_device *device)
gpudev->irq_trace(adreno_dev, status);
- if (status)
+ /*
+ * Clear A5XX_INT_RBBM_AHB_ERROR bit after this interrupt has been
+ * cleared in its respective handler
+ */
+ if (status & BIT(A5XX_INT_RBBM_AHB_ERROR))
adreno_writereg(adreno_dev, ADRENO_REG_RBBM_INT_CLEAR_CMD,
- status);
+ BIT(A5XX_INT_RBBM_AHB_ERROR));
+
return ret;
}