Merge b9c02af868b1e302eb71bb945ed0f09861399b02 on remote branchLA.UM.8.15.r1-06800-KAMORTA.0

Change-Id: Ic0359d5fbcf8f82aedcaa37e61ecf372e5c7fd92

14 files changed, 219 insertions, 81 deletions

diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index d5b56fd369ee..61e1b4af7bf5 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -1826,7 +1826,7 @@ static int diag_switch_logging_proc(struct diag_logging_mode_param_t *param,
 				DIAG_LOG(DIAG_DEBUG_USERSPACE,
 					"not switching modes c: %d n: %d\n",
 					curr_mode, new_mode);
-				return 0;
+				continue;
 			}
 
 			diag_ws_reset(DIAG_WS_MUX);
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
index acc50865aa4e..9f5595d87e24 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
@@ -3345,6 +3345,25 @@ static struct sk_buff *handle_skb_completion(struct gsi_chan_xfer_notify
 	if (notify->bytes_xfered)
 		rx_pkt->len = notify->bytes_xfered;
 
+	/*Drop packets when WAN consumer channel receive EOB event*/
+	if ((notify->evt_id == GSI_CHAN_EVT_EOB ||
+		sys->skip_eot) &&
+		sys->ep->client == IPA_CLIENT_APPS_WAN_CONS) {
+		dma_unmap_single(ipa3_ctx->pdev, rx_pkt->data.dma_addr,
+			sys->rx_buff_sz, DMA_FROM_DEVICE);
+		sys->free_skb(rx_pkt->data.skb);
+		sys->free_rx_wrapper(rx_pkt);
+		sys->eob_drop_cnt++;
+		if (notify->evt_id == GSI_CHAN_EVT_EOB) {
+			IPADBG("EOB event on WAN consumer channel, drop\n");
+			sys->skip_eot = true;
+		} else {
+			IPADBG("Reset skip eot flag.\n");
+			sys->skip_eot = false;
+		}
+		return NULL;
+	}
+
 	rx_skb = rx_pkt->data.skb;
 	skb_set_tail_pointer(rx_skb, rx_pkt->len);
 	rx_skb->len = rx_pkt->len;
@@ -3359,13 +3378,6 @@ static struct sk_buff *handle_skb_completion(struct gsi_chan_xfer_notify
 		return NULL;
 	}
 
-	/*Assesrt when WAN consumer channel receive EOB event*/
-	if (unlikely(notify->evt_id == GSI_CHAN_EVT_EOB &&
-		sys->ep->client == IPA_CLIENT_APPS_WAN_CONS)) {
-		IPAERR("EOB event received on WAN consumer channel\n");
-		ipa_assert();
-	}
-
 	head = &rx_pkt->sys->pending_pkts[notify->veid];
 
 	INIT_LIST_HEAD(&rx_pkt->link);
@@ -3940,8 +3952,9 @@ static int ipa3_assign_policy(struct ipa_sys_connect_params *in,
 			 * Dont enable ipa_status for APQ, since MDM IPA
 			 * has IPA >= 4.5 with DPLv3.
 			 */
-			if (ipa3_ctx->platform_type == IPA_PLAT_TYPE_APQ &&
-				ipa3_is_mhip_offload_enabled())
+			if ((ipa3_ctx->platform_type == IPA_PLAT_TYPE_APQ &&
+				ipa3_is_mhip_offload_enabled()) ||
+				(ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5))
 				sys->ep->status.status_en = false;
 			else
 				sys->ep->status.status_en = true;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
index c6c06b6762e2..e6af2ef3d458 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_i.h
@@ -1027,6 +1027,8 @@ struct ipa3_sys_context {
 	atomic_t xmit_eot_cnt;
 	struct tasklet_struct tasklet;
 	struct work_struct tasklet_work;
+	bool skip_eot;
+	u32 eob_drop_cnt;
 
 	/* ordering is important - mutable fields go above */
 	struct ipa3_ep_context *ep;
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_pm.h b/drivers/platform/msm/ipa/ipa_v3/ipa_pm.h
index baf7b0186b7c..9a5c7eb0bb2a 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_pm.h
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_pm.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _IPA_PM_H_
@@ -13,7 +13,7 @@
 #define IPA_PM_MAX_EX_CL 64
 #define IPA_PM_THRESHOLD_MAX 5
 #define IPA_PM_EXCEPTION_MAX 5
-#define IPA_PM_DEFERRED_TIMEOUT 10
+#define IPA_PM_DEFERRED_TIMEOUT 100
 
 /*
  * ipa_pm group names
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
index 1a7e47710a54..1728bf8fc15b 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
@@ -7576,13 +7576,9 @@ static bool ipa3_gsi_channel_is_quite(struct ipa3_ep_context *ep)
 	bool empty;
 
 	gsi_is_channel_empty(ep->gsi_chan_hdl, &empty);
-	if (!empty) {
+	if (!empty)
 		IPADBG("ch %ld not empty\n", ep->gsi_chan_hdl);
-		/* queue a work to start polling if don't have one */
-		atomic_set(&ipa3_ctx->transport_pm.eot_activity, 1);
-		if (!atomic_read(&ep->sys->curr_polling_state))
-			__ipa_gsi_irq_rx_scedule_poll(ep->sys);
-	}
+	/*Schedule NAPI only from interrupt context to avoid race conditions*/
 	return empty;
 }
 
diff --git a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
index cad2f4ad845f..b1fc78e17e8c 100644
--- a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
@@ -1428,6 +1428,7 @@ static void apps_ipa_packet_receive_notify(void *priv,
 		IPAWANDBG_LOW("Rx packet was received");
 		skb->dev = IPA_NETDEV();
 		skb->protocol = htons(ETH_P_MAP);
+		skb_set_mac_header(skb, 0);
 
 		if (ipa3_rmnet_res.ipa_napi_enable) {
 			trace_rmnet_ipa_netif_rcv_skb3(dev->stats.rx_packets);
diff --git a/drivers/rpmsg/qcom_glink_native.c b/drivers/rpmsg/qcom_glink_native.c
index e0b4c3a268ab..584a9ba55519 100644
--- a/drivers/rpmsg/qcom_glink_native.c
+++ b/drivers/rpmsg/qcom_glink_native.c
@@ -1017,11 +1017,17 @@ static int qcom_glink_rx_data(struct qcom_glink *glink, size_t avail)
 	if (!left_size) {
 		spin_lock(&channel->recv_lock);
 		if (channel->ept.cb) {
-			channel->ept.cb(channel->ept.rpdev,
+			ret = channel->ept.cb(channel->ept.rpdev,
 					intent->data,
 					intent->offset,
 					channel->ept.priv,
 					RPMSG_ADDR_ANY);
+			if (ret < 0)
+				CH_INFO(channel,
+					"glink:callback error ret = %d\n", ret);
+		} else {
+			CH_INFO(channel, "callback not present\n");
+			dev_err(glink->dev, "glink:callback not present\n");
 		}
 		spin_unlock(&channel->recv_lock);
 
@@ -1361,13 +1367,14 @@ static struct rpmsg_endpoint *qcom_glink_create_ept(struct rpmsg_device *rpdev,
 		if (ret)
 			return NULL;
 	}
+	CH_INFO(channel, "Initializing ept\n");
 
 	ept = &channel->ept;
 	ept->rpdev = rpdev;
 	ept->cb = cb;
 	ept->priv = priv;
 	ept->ops = &glink_endpoint_ops;
-
+	CH_INFO(channel, "Initialized ept\n");
 	return ept;
 }
 
@@ -1387,6 +1394,7 @@ static int qcom_glink_announce_create(struct rpmsg_device *rpdev)
 	int iid;
 	int size;
 
+	CH_INFO(channel, "Entered\n");
 	if (glink->intentless || !completion_done(&channel->open_ack))
 		return 0;
 
@@ -1423,6 +1431,7 @@ static int qcom_glink_announce_create(struct rpmsg_device *rpdev)
 			qcom_glink_advertise_intent(glink, channel, intent);
 		}
 	}
+	CH_INFO(channel, "Exit\n");
 	return 0;
 }
 
diff --git a/drivers/soc/qcom/ramdump.c b/drivers/soc/qcom/ramdump.c
index 4746a9fea2a9..1555c4f44475 100644
--- a/drivers/soc/qcom/ramdump.c
+++ b/drivers/soc/qcom/ramdump.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2020, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/kernel.h>
@@ -17,6 +17,7 @@
 #include <linux/elf.h>
 #include <linux/wait.h>
 #include <linux/cdev.h>
+#include <linux/srcu.h>
 #include <linux/atomic.h>
 #include <soc/qcom/ramdump.h>
 #include <linux/dma-mapping.h>
@@ -61,6 +62,8 @@ struct ramdump_device {
 	char *elfcore_buf;
 	unsigned long attrs;
 	bool complete_ramdump;
+	bool abort_ramdump;
+	struct srcu_struct rd_srcu;
 };
 
 static int ramdump_open(struct inode *inode, struct file *filep)
@@ -160,15 +163,26 @@ static ssize_t ramdump_read(struct file *filep, char __user *buf, size_t count,
 	size_t copy_size = 0, alignsize;
 	unsigned char *alignbuf = NULL, *finalbuf = NULL;
 	int ret = 0;
+	int srcu_idx;
 	loff_t orig_pos = *pos;
 
 	if ((filep->f_flags & O_NONBLOCK) && !entry->data_ready)
 		return -EAGAIN;
 
-	ret = wait_event_interruptible(rd_dev->dump_wait_q, entry->data_ready);
+	ret = wait_event_interruptible(rd_dev->dump_wait_q,
+				(entry->data_ready || rd_dev->abort_ramdump));
 	if (ret)
 		return ret;
 
+	srcu_idx = srcu_read_lock(&rd_dev->rd_srcu);
+
+	if (rd_dev->abort_ramdump) {
+		pr_err("Ramdump(%s): Ramdump aborted\n", rd_dev->name);
+		rd_dev->ramdump_status = -1;
+		ret = -ETIME;
+		goto ramdump_done;
+	}
+
 	if (*pos < rd_dev->elfcore_size) {
 		copy_size = rd_dev->elfcore_size - *pos;
 		copy_size = min(copy_size, count);
@@ -180,8 +194,10 @@ static ssize_t ramdump_read(struct file *filep, char __user *buf, size_t count,
 		*pos += copy_size;
 		count -= copy_size;
 		buf += copy_size;
-		if (count == 0)
+		if (count == 0) {
+			srcu_read_unlock(&rd_dev->rd_srcu, srcu_idx);
 			return copy_size;
+		}
 	}
 
 	addr = offset_translate(*pos - rd_dev->elfcore_size, rd_dev,
@@ -258,12 +274,15 @@ static ssize_t ramdump_read(struct file *filep, char __user *buf, size_t count,
 	pr_debug("Ramdump(%s): Read %zd bytes from address %lx.",
 			rd_dev->name, copy_size, addr);
 
+	srcu_read_unlock(&rd_dev->rd_srcu, srcu_idx);
+
 	return *pos - orig_pos;
 
 ramdump_done:
 	if (!vaddr && origdevice_mem)
 		dma_unremap(rd_dev->dev->parent, origdevice_mem, copy_size);
 
+	srcu_read_unlock(&rd_dev->rd_srcu, srcu_idx);
 	kfree(finalbuf);
 	*pos = 0;
 	reset_ramdump_entry(entry);
@@ -368,6 +387,7 @@ void *create_ramdump_device(const char *dev_name, struct device *parent)
 
 	mutex_init(&rd_dev->consumer_lock);
 	atomic_set(&rd_dev->readers_left, 0);
+	init_srcu_struct(&rd_dev->rd_srcu);
 	cdev_init(&rd_dev->cdev, &ramdump_file_ops);
 
 	ret = cdev_add(&rd_dev->cdev, MKDEV(MAJOR(ramdump_dev), minor), 1);
@@ -380,6 +400,7 @@ void *create_ramdump_device(const char *dev_name, struct device *parent)
 	return (void *)rd_dev;
 
 fail_cdev_add:
+	cleanup_srcu_struct(&rd_dev->rd_srcu);
 	mutex_destroy(&rd_dev->consumer_lock);
 	device_unregister(rd_dev->dev);
 fail_return_minor:
@@ -400,6 +421,7 @@ void destroy_ramdump_device(void *dev)
 
 	cdev_del(&rd_dev->cdev);
 	device_unregister(rd_dev->dev);
+	cleanup_srcu_struct(&rd_dev->rd_srcu);
 	ida_simple_remove(&rd_minor_id, minor);
 	kfree(rd_dev);
 }
@@ -480,6 +502,7 @@ static int _do_ramdump(void *handle, struct ramdump_segment *segments,
 	list_for_each_entry(entry, &rd_dev->consumer_list, list)
 		entry->data_ready = true;
 	rd_dev->ramdump_status = -1;
+	rd_dev->abort_ramdump = false;
 
 	reinit_completion(&rd_dev->ramdump_complete);
 	atomic_set(&rd_dev->readers_left, rd_dev->consumers);
@@ -496,6 +519,11 @@ static int _do_ramdump(void *handle, struct ramdump_segment *segments,
 		pr_err("Ramdump(%s): Timed out waiting for userspace.\n",
 			rd_dev->name);
 		ret = -EPIPE;
+		rd_dev->abort_ramdump = true;
+
+		/* Wait for pending readers to complete (if any) */
+		synchronize_srcu(&rd_dev->rd_srcu);
+
 	} else
 		ret = (rd_dev->ramdump_status == 0) ? 0 : -EPIPE;
 
@@ -609,6 +637,7 @@ static int _do_minidump(void *handle, struct ramdump_segment *segments,
 	list_for_each_entry(entry, &rd_dev->consumer_list, list)
 		entry->data_ready = true;
 	rd_dev->ramdump_status = -1;
+	rd_dev->abort_ramdump = false;
 
 	reinit_completion(&rd_dev->ramdump_complete);
 	atomic_set(&rd_dev->readers_left, rd_dev->consumers);
@@ -625,6 +654,10 @@ static int _do_minidump(void *handle, struct ramdump_segment *segments,
 		pr_err("Ramdump(%s): Timed out waiting for userspace.\n",
 		       rd_dev->name);
 		ret = -EPIPE;
+		rd_dev->abort_ramdump = true;
+
+		/* Wait for pending readers to complete (if any) */
+		synchronize_srcu(&rd_dev->rd_srcu);
 	} else {
 		ret = (rd_dev->ramdump_status == 0) ? 0 : -EPIPE;
 	}
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 286cebea28d1..539e61c101f5 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -103,6 +103,7 @@
 #define RX_IO_POS_FF_EN_SEL_SHFT	4
 #define RX_IO_EN2CORE_EN_DELAY_SHFT	8
 #define RX_SI_EN2IO_DELAY_SHFT 12
+#define SB_PIPE_SEL_SHIFT	20
 
 struct gsi_desc_cb {
 	struct spi_master *spi;
@@ -164,6 +165,8 @@ struct spi_geni_master {
 	bool cmd_done;
 	bool set_miso_sampling;
 	u32 miso_sampling_ctrl_val;
+	int set_cs_sb_delay; /*SB PIPE Delay */
+	int set_pre_cmd_dly; /*Pre command Delay */
 };
 
 static struct spi_master *get_spi_master(struct device *dev)
@@ -805,13 +808,63 @@ static int spi_geni_unprepare_message(struct spi_master *spi_mas,
 	return 0;
 }
 
+static void spi_geni_set_sampling_rate(struct spi_geni_master *mas,
+	unsigned int major, unsigned int minor)
+{
+	u32 cpol, cpha, cfg_reg108, cfg_reg109, cfg_seq_start;
+
+	cpol = geni_read_reg(mas->base, SE_SPI_CPOL);
+	cpha = geni_read_reg(mas->base, SE_SPI_CPHA);
+	cfg_reg108 = geni_read_reg(mas->base, SE_GENI_CFG_REG108);
+	cfg_reg109 = geni_read_reg(mas->base, SE_GENI_CFG_REG109);
+	/* clear CPOL bit */
+	cfg_reg108 &= ~(1 << CPOL_CTRL_SHFT);
+
+	if (major == 1 && minor == 0) {
+		/* Write 1 to RX_SI_EN2IO_DELAY reg */
+		cfg_reg108 &= ~(0x7 << RX_SI_EN2IO_DELAY_SHFT);
+		cfg_reg108 |= (1 << RX_SI_EN2IO_DELAY_SHFT);
+		/* Write 0 to RX_IO_POS_FF_EN_SEL reg */
+		cfg_reg108 &= ~(1 << RX_IO_POS_FF_EN_SEL_SHFT);
+	} else if ((major < 2) || (major == 2 && minor < 5)) {
+		/* Write 0 to RX_IO_EN2CORE_EN_DELAY reg */
+		cfg_reg108 &= ~(0x7 << RX_IO_EN2CORE_EN_DELAY_SHFT);
+	} else {
+		/*
+		 * Write miso_sampling_ctrl_set to
+		 * RX_IO_EN2CORE_EN_DELAY reg
+		 */
+		cfg_reg108 &= ~(0x7 << RX_IO_EN2CORE_EN_DELAY_SHFT);
+		cfg_reg108 |= (mas->miso_sampling_ctrl_val <<
+				RX_IO_EN2CORE_EN_DELAY_SHFT);
+	}
+
+	geni_write_reg(cfg_reg108, mas->base, SE_GENI_CFG_REG108);
+
+	if (cpol == 0 && cpha == 0)
+		cfg_reg109 = 1;
+	else if (cpol == 1 && cpha == 0)
+		cfg_reg109 = 0;
+	geni_write_reg(cfg_reg109, mas->base,
+				SE_GENI_CFG_REG109);
+	if (!(major == 1 && minor == 0))
+		geni_write_reg(1, mas->base, SE_GENI_CFG_SEQ_START);
+	cfg_reg108 = geni_read_reg(mas->base, SE_GENI_CFG_REG108);
+	cfg_reg109 = geni_read_reg(mas->base, SE_GENI_CFG_REG109);
+	cfg_seq_start = geni_read_reg(mas->base, SE_GENI_CFG_SEQ_START);
+
+	GENI_SE_DBG(mas->ipc, false, mas->dev,
+		"%s cfg108: 0x%x cfg109: 0x%x cfg_seq_start: 0x%x\n",
+		__func__, cfg_reg108, cfg_reg109, cfg_seq_start);
+}
+
 static int spi_geni_prepare_transfer_hardware(struct spi_master *spi)
 {
 	struct spi_geni_master *mas = spi_master_get_devdata(spi);
 	int ret = 0, count = 0;
 	u32 max_speed = spi->cur_msg->spi->max_speed_hz;
 	struct se_geni_rsc *rsc = &mas->spi_rsc;
-	u32 cpol, cpha, cfg_reg108, cfg_reg109, cfg_seq_start;
+	u32 cfg_reg108;
 
 	/* Adjust the IB based on the max speed of the slave.*/
 	rsc->ib = max_speed * DEFAULT_BUS_WIDTH;
@@ -933,56 +986,27 @@ setup_ipc:
 			__func__, major, minor, step, mas->oversampling);
 		}
 
-		if (!mas->set_miso_sampling)
-			goto shared_se;
-
-		cpol = geni_read_reg(mas->base, SE_SPI_CPOL);
-		cpha = geni_read_reg(mas->base, SE_SPI_CPHA);
-		cfg_reg108 = geni_read_reg(mas->base, SE_GENI_CFG_REG108);
-		cfg_reg109 = geni_read_reg(mas->base, SE_GENI_CFG_REG109);
-		/* clear CPOL bit */
-		cfg_reg108 &= ~(1 << CPOL_CTRL_SHFT);
-
-		if (major == 1 && minor == 0) {
-			/* Write 1 to RX_SI_EN2IO_DELAY reg */
-			cfg_reg108 &= ~(0x7 << RX_SI_EN2IO_DELAY_SHFT);
-			cfg_reg108 |= (1 << RX_SI_EN2IO_DELAY_SHFT);
-			/* Write 0 to RX_IO_POS_FF_EN_SEL reg */
-			cfg_reg108 &= ~(1 << RX_IO_POS_FF_EN_SEL_SHFT);
-		} else if ((major < 2) || (major == 2 && minor < 5)) {
-			/* Write 0 to RX_IO_EN2CORE_EN_DELAY reg */
-			cfg_reg108 &= ~(0x7 << RX_IO_EN2CORE_EN_DELAY_SHFT);
-		} else {
-			/*
-			 * Write miso_sampling_ctrl_set to
-			 * RX_IO_EN2CORE_EN_DELAY reg
-			 */
-			cfg_reg108 &= ~(0x7 << RX_IO_EN2CORE_EN_DELAY_SHFT);
-			cfg_reg108 |= (mas->miso_sampling_ctrl_val <<
-					RX_IO_EN2CORE_EN_DELAY_SHFT);
+		if (mas->set_miso_sampling)
+			spi_geni_set_sampling_rate(mas, major, minor);
+
+		/* Add the SB pipe delay */
+		if (mas->set_cs_sb_delay) {
+			cfg_reg108 =
+				geni_read_reg(mas->base, SE_GENI_CFG_REG108);
+			/* Clear the sb pipe delay register value */
+			cfg_reg108 &=
+				~(0x3 << SB_PIPE_SEL_SHIFT);
+			/* Write the value into sb pipe delay register */
+			cfg_reg108 |=
+				(mas->set_cs_sb_delay << SB_PIPE_SEL_SHIFT);
+			geni_write_reg(cfg_reg108,
+				mas->base, SE_GENI_CFG_REG108);
 		}
 
-		geni_write_reg(cfg_reg108, mas->base, SE_GENI_CFG_REG108);
-
-		if (cpol == 0 && cpha == 0)
-			cfg_reg109 = 1;
-		else if (cpol == 1 && cpha == 0)
-			cfg_reg109 = 0;
-		geni_write_reg(cfg_reg109, mas->base,
-					SE_GENI_CFG_REG109);
-		if (!(major == 1 && minor == 0))
-			geni_write_reg(1, mas->base, SE_GENI_CFG_SEQ_START);
-		cfg_reg108 = geni_read_reg(mas->base, SE_GENI_CFG_REG108);
-		cfg_reg109 = geni_read_reg(mas->base, SE_GENI_CFG_REG109);
-		cfg_seq_start = geni_read_reg(mas->base, SE_GENI_CFG_SEQ_START);
-
-		GENI_SE_DBG(mas->ipc, false, mas->dev,
-			"%s cfg108: 0x%x cfg109: 0x%x cfg_seq_start: 0x%x\n",
-			__func__, cfg_reg108, cfg_reg109, cfg_seq_start);
-shared_se:
 		mas->shared_se =
 			(geni_read_reg(mas->base, GENI_IF_FIFO_DISABLE_RO) &
 							FIFO_IF_DISABLE);
+
 		if (mas->dis_autosuspend)
 			GENI_SE_DBG(mas->ipc, false, mas->dev,
 					"Auto Suspend is disabled\n");
@@ -1033,6 +1057,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
 	u32 m_param = 0;
 	u32 spi_tx_cfg = geni_read_reg(mas->base, SE_SPI_TRANS_CFG);
 	u32 trans_len = 0, fifo_size = 0;
+	u32 spi_pre_cmd_dly;
 
 	if (xfer->bits_per_word != mas->cur_word_len) {
 		spi_setup_word_len(mas, mode, xfer->bits_per_word);
@@ -1085,6 +1110,16 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
 			m_param |= FRAGMENTATION;
 	}
 
+	/* Add pre command delay */
+	if (mas->set_pre_cmd_dly) {
+		m_param |= SPI_PRE_CMD_DELAY;
+		spi_pre_cmd_dly = geni_read_reg(mas->base,
+			SE_SPI_PRE_POST_CMD_DLY);
+		spi_pre_cmd_dly += mas->set_pre_cmd_dly;
+		geni_write_reg(spi_pre_cmd_dly, mas->base,
+			SE_SPI_PRE_POST_CMD_DLY);
+	}
+
 	mas->cur_xfer = xfer;
 	if (m_cmd & SPI_TX_ONLY) {
 		mas->tx_rem_bytes = xfer->len;
@@ -1597,6 +1632,21 @@ static int spi_geni_probe(struct platform_device *pdev)
 			dev_info(&pdev->dev, "MISO_SAMPLING_SET: %d\n",
 				geni_mas->miso_sampling_ctrl_val);
 	}
+
+	/* On minicore based targets like bengal, increasing the cs delay
+	 * using spi_cs_clk_dly register introduces unwanted inter words delay.
+	 * So, SB_PIPE_SEL register can be used to achieve this purpose. In
+	 * such cases, set SPI_PRE_POST_CMD_DLY = n+SB_PIPE_SEL (if it was set
+	 * as n before) to delay the clock initially by the same number of
+	 * clocks as SB_PIPE_SEL.
+	 */
+	if (!of_property_read_u32(pdev->dev.of_node,
+		"qcom,set-cs-sb-delay", &geni_mas->set_cs_sb_delay)) {
+		dev_dbg(&pdev->dev, "CS Sb pipe delay set: %d",
+			geni_mas->set_cs_sb_delay);
+		geni_mas->set_pre_cmd_dly = geni_mas->set_cs_sb_delay;
+	}
+
 	geni_mas->phys_addr = res->start;
 	geni_mas->size = resource_size(res);
 	geni_mas->base = devm_ioremap(&pdev->dev, res->start,
diff --git a/include/linux/sched.h b/include/linux/sched.h
index b73670709c8d..c0214b0af137 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -130,6 +130,7 @@ enum fps {
 	FPS60 = 60,
 	FPS90 = 90,
 	FPS120 = 120,
+	FPS144 = 144,
 };
 
 #ifdef CONFIG_DEBUG_ATOMIC_SLEEP
diff --git a/include/uapi/media/msm_media_info.h b/include/uapi/media/msm_media_info.h
index d3472180cf41..9359b0cc6898 100644
--- a/include/uapi/media/msm_media_info.h
+++ b/include/uapi/media/msm_media_info.h
@@ -2,6 +2,23 @@
 #ifndef __MSM_MEDIA_INFO_H__
 #define __MSM_MEDIA_INFO_H__
 
+#include <asm/bitsperlong.h>
+
+#if __BITS_PER_LONG == 64
+#define NV12_STRIDE_ALIGNMENT 512
+#define NV12_SCANLINE_ALIGNMENT 512
+#else
+#define NV12_STRIDE_ALIGNMENT 128
+#define NV12_SCANLINE_ALIGNMENT 32
+#endif
+
+#ifdef VENUS_USE_64BIT_ALIGNMENT
+#undef NV12_STRIDE_ALIGNMENT
+#undef NV12_SCANLINE_ALIGNMENT
+#define NV12_STRIDE_ALIGNMENT 512
+#define NV12_SCANLINE_ALIGNMENT 512
+#endif
+
 /* Width and Height should be multiple of 16 */
 #define INTERLACE_WIDTH_MAX 1920
 #define INTERLACE_HEIGHT_MAX 1920
@@ -45,10 +62,10 @@ enum color_fmts {
 	 * . . . . . . . . . . . . . . . .  V
 	 * . . . . . . . . . . . . . . . .  --> Buffer size alignment
 	 *
-	 * Y_Stride : Width aligned to 512
-	 * UV_Stride : Width aligned to 512
-	 * Y_Scanlines: Height aligned to 512
-	 * UV_Scanlines: Height/2 aligned to 256
+	 * Y_Stride : Width aligned to 512 or 128
+	 * UV_Stride : Width aligned to 512 or 128
+	 * Y_Scanlines: Height aligned to 512 or 32
+	 * UV_Scanlines: Height/2 aligned to 256 or 16
 	 * Total size = align(Y_Stride * Y_Scanlines
 	 *          + UV_Stride * UV_Scanlines, 4096)
 	 */
@@ -80,10 +97,10 @@ enum color_fmts {
 	 * . . . . . . . . . . . . . . . .  V
 	 * . . . . . . . . . . . . . . . .  --> Padding & Buffer size alignment
 	 *
-	 * Y_Stride : Width aligned to 512
-	 * UV_Stride : Width aligned to 512
-	 * Y_Scanlines: Height aligned to 512
-	 * UV_Scanlines: Height/2 aligned to 256
+	 * Y_Stride : Width aligned to 512 or 128
+	 * UV_Stride : Width aligned to 512 or 128
+	 * Y_Scanlines: Height aligned to 512 or 32
+	 * UV_Scanlines: Height/2 aligned to 256 or 16
 	 * Total size = align(Y_Stride * Y_Scanlines
 	 *          + UV_Stride * UV_Scanlines, 4096)
 	 */
@@ -782,6 +799,9 @@ static inline unsigned int VENUS_Y_STRIDE(unsigned int color_fmt,
 	switch (color_fmt) {
 	case COLOR_FMT_NV12:
 	case COLOR_FMT_NV21:
+		alignment = NV12_STRIDE_ALIGNMENT;
+		stride = MSM_MEDIA_ALIGN(width, alignment);
+		break;
 	case COLOR_FMT_NV12_512:
 		alignment = 512;
 		stride = MSM_MEDIA_ALIGN(width, alignment);
@@ -825,6 +845,9 @@ static inline unsigned int VENUS_UV_STRIDE(unsigned int color_fmt,
 	switch (color_fmt) {
 	case COLOR_FMT_NV21:
 	case COLOR_FMT_NV12:
+		alignment = NV12_STRIDE_ALIGNMENT;
+		stride = MSM_MEDIA_ALIGN(width, alignment);
+		break;
 	case COLOR_FMT_NV12_512:
 		alignment = 512;
 		stride = MSM_MEDIA_ALIGN(width, alignment);
@@ -868,6 +891,8 @@ static inline unsigned int VENUS_Y_SCANLINES(unsigned int color_fmt,
 	switch (color_fmt) {
 	case COLOR_FMT_NV12:
 	case COLOR_FMT_NV21:
+		alignment = NV12_SCANLINE_ALIGNMENT;
+		break;
 	case COLOR_FMT_NV12_512:
 		alignment = 512;
 		break;
@@ -905,6 +930,8 @@ static inline unsigned int VENUS_UV_SCANLINES(unsigned int color_fmt,
 	switch (color_fmt) {
 	case COLOR_FMT_NV21:
 	case COLOR_FMT_NV12:
+		alignment = NV12_SCANLINE_ALIGNMENT/2;
+		break;
 	case COLOR_FMT_NV12_512:
 		alignment = 256;
 		break;
diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
index 1d2f147f737d..590bbd40e788 100644
--- a/kernel/dma/direct.c
+++ b/kernel/dma/direct.c
@@ -85,7 +85,8 @@ again:
 			page = NULL;
 		}
 	}
-	if (!page)
+	if (!page && !(attrs & (DMA_ATTR_STRONGLY_ORDERED |
+				DMA_ATTR_NO_KERNEL_MAPPING)))
 		page = alloc_pages_node(dev_to_node(dev), gfp, page_order);
 
 	if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
index 2a8c41f12d45..1dc1ec0d9383 100644
--- a/kernel/dma/swiotlb.c
+++ b/kernel/dma/swiotlb.c
@@ -1026,7 +1026,8 @@ void *swiotlb_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
 	gfp |= __GFP_NOWARN;
 
 	vaddr = dma_direct_alloc(dev, size, dma_handle, gfp, attrs);
-	if (!vaddr)
+	if (!vaddr && !(attrs & (DMA_ATTR_STRONGLY_ORDERED |
+				DMA_ATTR_NO_KERNEL_MAPPING)))
 		vaddr = swiotlb_alloc_buffer(dev, size, dma_handle, attrs);
 	return vaddr;
 }
diff --git a/net/qrtr/smd.c b/net/qrtr/smd.c
index fff972011fb1..aec36db4e4ef 100644
--- a/net/qrtr/smd.c
+++ b/net/qrtr/smd.c
@@ -23,8 +23,10 @@ static int qcom_smd_qrtr_callback(struct rpmsg_device *rpdev,
 	struct qrtr_smd_dev *qdev = dev_get_drvdata(&rpdev->dev);
 	int rc;
 
-	if (!qdev)
+	if (!qdev) {
+		pr_err("%d:Not ready\n", __func__);
 		return -EAGAIN;
+	}
 
 	rc = qrtr_endpoint_post(&qdev->ep, data, len);
 	if (rc == -EINVAL) {
@@ -62,6 +64,7 @@ static int qcom_smd_qrtr_probe(struct rpmsg_device *rpdev)
 	u32 net_id;
 	bool rt;
 	int rc;
+	pr_err("%d:Entered\n", __func__);
 
 	qdev = devm_kzalloc(&rpdev->dev, sizeof(*qdev), GFP_KERNEL);
 	if (!qdev)
@@ -83,7 +86,8 @@ static int qcom_smd_qrtr_probe(struct rpmsg_device *rpdev)
 
 	dev_set_drvdata(&rpdev->dev, qdev);
 
-	dev_dbg(&rpdev->dev, "Qualcomm SMD QRTR driver probed\n");
+	pr_err("%d:SMD QRTR driver probed\n", __func__);
+	dev_dbg(&rpdev->dev, "SMD QRTR driver probed\n");
 
 	return 0;
 }