diff options
| author | qctecmdr <qctecmdr@localhost> | 2020-07-01 08:29:56 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2020-07-01 08:29:56 -0700 |
| commit | 97ac11a9ff8e6a389ded5dd82720e8412e34ef09 (patch) | |
| tree | 27c99bd9085fc0e34bf637a15eb2b1aa2aaa679e | |
| parent | 56ce4ca63bfb5a5767157903f77f711fa6ef9758 (diff) | |
| parent | 9de1191828409720d66e1b3a64d14db141030547 (diff) | |
Merge "iommu/arm-smmu: report BID, PID and MID of client on context fault"LA.UM.8.12.c3-07700-sm8250.0
| -rw-r--r-- | drivers/iommu/arm-smmu-regs.h | 4 | ||||
| -rw-r--r-- | drivers/iommu/arm-smmu.c | 12 |
2 files changed, 15 insertions, 1 deletions
diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index 3921487dde80..f43a8b6edfca 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -273,4 +273,8 @@ enum arm_smmu_s2cr_privcfg { #define ACTLR_QCOM_NSH_SHIFT 30 #define ACTLR_QCOM_NSH 1 +#define FSYNR1_BID GENMASK(15, 13) +#define FSYNR1_PID GENMASK(12, 8) +#define FSYNR1_MID GENMASK(7, 0) + #endif /* _ARM_SMMU_REGS_H */ diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 42f6a2d428e9..d5cbf1f220b0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -70,6 +70,7 @@ #include "iommu-logger.h" #include <linux/debugfs.h> #include <linux/uaccess.h> +#include <linux/bitfield.h> /* * Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU @@ -1737,6 +1738,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) "Context fault handled by client: iova=0x%08lx, cb=%d, fsr=0x%x, fsynr0=0x%x, fsynr1=0x%x\n", iova, cfg->cbndx, fsr, fsynr0, fsynr1); dev_dbg(smmu->dev, + "Client info: BID=0x%x, PID=0x%x, MID=0x%x\n", + FIELD_GET(FSYNR1_BID, fsynr1), + FIELD_GET(FSYNR1_PID, fsynr1), + FIELD_GET(FSYNR1_MID, fsynr1)); + dev_dbg(smmu->dev, "soft iova-to-phys=%pa\n", &phys_soft); ret = IRQ_HANDLED; resume = RESUME_TERMINATE; @@ -1749,7 +1755,11 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) dev_err(smmu->dev, "Unhandled context fault: iova=0x%08lx, cb=%d, fsr=0x%x, fsynr0=0x%x, fsynr1=0x%x\n", iova, cfg->cbndx, fsr, fsynr0, fsynr1); - + dev_err(smmu->dev, + "Client info: BID=0x%x, PID=0x%x, MID=0x%x\n", + FIELD_GET(FSYNR1_BID, fsynr1), + FIELD_GET(FSYNR1_PID, fsynr1), + FIELD_GET(FSYNR1_MID, fsynr1)); dev_err(smmu->dev, "soft iova-to-phys=%pa\n", &phys_soft); |