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| author | Anant Goel <anantg@codeaurora.org> | 2019-09-20 10:41:25 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2019-09-30 08:39:16 -0700 |
| commit | fb1d4d500395da5e2754bb1711d095dbf4d70b3c (patch) | |
| tree | 7aa9c613c1ef995d2a502be99750c6832a1328c3 | |
| parent | 009a20cc8105106918a428d89817d238ceb1df59 (diff) | |
ARM: dts: msm: Enable SDHC controller for SA8155 VMLA.AU.0.1.0.r2-01000-sa8155_gvmq.0
The SA8155 VM needs to access the SDHC_2 controller.
Enable the SDHC_2 controller to do so.
Change-Id: I22e2ba2aa490ecc2f180c11b8b27263c999ed5e4
Signed-off-by: Anant Goel <anantg@codeaurora.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sa8155-vm.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8155-vm.dts b/arch/arm64/boot/dts/qcom/sa8155-vm.dts index 8f9a719cd249..800ecda4ae05 100644 --- a/arch/arm64/boot/dts/qcom/sa8155-vm.dts +++ b/arch/arm64/boot/dts/qcom/sa8155-vm.dts @@ -41,3 +41,7 @@ &pcie0 { status = "ok"; }; + +&sdhc_2 { + status = "ok"; +}; |