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authorVivek Aknurwar <viveka@codeaurora.org>2019-11-01 15:49:16 -0700
committerGerrit - the friendly Code Review server <code-review@localhost>2019-11-07 16:45:45 -0800
commitc3a82c5caa43734fda4018b8657005069ab27dce (patch)
tree4633aac36d121f847db4f77e2c2d0ee748a92ae5
parentca1cbb7fa4dcbebb5fa9e4b680332633fb5fa537 (diff)
clk: qcom: gcc: Update pcie aux clks to 19.2Mhz for all cornersLA.UM.8.1.r1-11100-sm8150.0
Update pcie aux clks to 19.2Mhz for all corners. Change-Id: I2f57249d6fc5596019c201402f2f5b5f0942bd2d Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
-rw-r--r--drivers/clk/qcom/gcc-sm8150.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 77d4e6e1a88c..e66845cead93 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -512,8 +512,7 @@ static struct clk_rcg2 gcc_pcie_0_aux_clk_src = {
.vdd_class = &vdd_cx,
.num_rate_max = VDD_NUM,
.rate_max = (unsigned long[VDD_NUM]) {
- [VDD_MIN] = 9600000,
- [VDD_LOW] = 19200000},
+ [VDD_MIN] = 19200000},
},
};
@@ -532,8 +531,7 @@ static struct clk_rcg2 gcc_pcie_1_aux_clk_src = {
.vdd_class = &vdd_cx,
.num_rate_max = VDD_NUM,
.rate_max = (unsigned long[VDD_NUM]) {
- [VDD_MIN] = 9600000,
- [VDD_LOW] = 19200000},
+ [VDD_MIN] = 19200000},
},
};