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authorBryan O'Donoghue <bryan.odonoghue@linaro.org>2022-01-06 10:59:57 +0000
committerBryan O'Donoghue <bryan.odonoghue@linaro.org>2022-02-01 00:01:40 +0000
commit47d5300ff0cd4ac94414654daef32ba83c8d4c11 (patch)
tree6b0715148a83b61f12dd69d6478775305b7226fa
parent0b2a55b79472c6c0cc28de098373532edde2c9f8 (diff)
media: camss: Point sdm845 at the correct vdda regulators
Reviewing the RB3 schematic its clear that we have missed out on defining one of the power-rails associated with the CSI PHY. Other PHYs such as the UFS, PCIe and USB connect to these rails and define each regulator individually. This means if we were to switch off the other various PHYs which enable these rails, the CAMSS would not appropriately power-on the CSI PHY. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
-rw-r--r--drivers/media/platform/qcom/camss/camss.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 419c48c4f1d5..6de257502e88 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -543,7 +543,7 @@ static const struct resources csiphy_res_845[] = {
static const struct resources csid_res_845[] = {
/* CSID0 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe0", "vfe0_src",
"vfe0_cphy_rx", "csi0",
@@ -563,7 +563,7 @@ static const struct resources csid_res_845[] = {
/* CSID1 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe1", "vfe1_src",
"vfe1_cphy_rx", "csi1",
@@ -583,7 +583,7 @@ static const struct resources csid_res_845[] = {
/* CSID2 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe_lite", "vfe_lite_src",
"vfe_lite_cphy_rx", "csi2",