diff options
| author | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2020-03-12 16:06:57 +0000 |
|---|---|---|
| committer | Bryan O'Donoghue <bryan.odonoghue@linaro.org> | 2020-03-12 20:29:41 +0000 |
| commit | d76a93d8b7a5eb0ce9eeeca7be6f73f9deabedfb (patch) | |
| tree | 8ce0ec845c6e35d33faae648baaf2fc37ee9e4fe | |
| parent | d2ea2391c59196a37bb30e2c2bbe4379c0d822ae (diff) | |
clk: qcom: gcc-msm8939: Add venus coreX GDSC entriessquare-initial-boot-gcc-clock-updates-wip-v1
Add entries for Venus Core0 and Core1 GDSC registers.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
| -rw-r--r-- | drivers/clk/qcom/gcc-msm8939.c | 18 | ||||
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-msm8939.h | 2 |
2 files changed, 20 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8939.c b/drivers/clk/qcom/gcc-msm8939.c index 2e27dfe36910..c0430a79a02f 100644 --- a/drivers/clk/qcom/gcc-msm8939.c +++ b/drivers/clk/qcom/gcc-msm8939.c @@ -3497,6 +3497,22 @@ static struct gdsc oxili_gdsc = { .pwrsts = PWRSTS_OFF_ON, }; +static struct gdsc venus_core0_gdsc = { + .gdscr = 0x4c028, + .pd = { + .name = "venus_core0", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc venus_core1_gdsc = { + .gdscr = 0x4c030, + .pd = { + .name = "venus_core1", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_msm8939_clocks[] = { [GPLL0] = &gpll0.clkr, [GPLL0_VOTE] = &gpll0_vote, @@ -3689,6 +3705,8 @@ static struct gdsc *gcc_msm8939_gdscs[] = { [JPEG_GDSC] = &jpeg_gdsc, [VFE_GDSC] = &vfe_gdsc, [OXILI_GDSC] = &oxili_gdsc, + [VENUS_CORE0_GDSC] = &venus_core0_gdsc, + [VENUS_CORE1_GDSC] = &venus_core1_gdsc, }; static const struct qcom_reset_map gcc_msm8939_resets[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-msm8939.h b/include/dt-bindings/clock/qcom,gcc-msm8939.h index 290251cf4b7b..f9380b6bd969 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8939.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8939.h @@ -205,5 +205,7 @@ #define JPEG_GDSC 3 #define VFE_GDSC 4 #define OXILI_GDSC 5 +#define VENUS_CORE0_GDSC 6 +#define VENUS_CORE1_GDSC 7 #endif |