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authorFathi Boudra <fathi.boudra@linaro.org>2013-07-18 14:50:04 +0300
committerFathi Boudra <fathi.boudra@linaro.org>2013-07-18 14:50:04 +0300
commit2785f39aa9c3a19834046a878367d25af4868781 (patch)
tree22a3dfcb92703f15e209c942b5d692f0d7319013 /meta-linaro-toolchain
parent97e495980a13ef3473db5c9d1b7069b0ad344363 (diff)
downloadmeta-linaro-2785f39aa9c3a19834046a878367d25af4868781.tar.gz
Add patch to fix PR target/57909 (LP: #1200620):
Fix unaligned load/store usage in HI mode. Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
Diffstat (limited to 'meta-linaro-toolchain')
-rw-r--r--meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8.inc5
-rw-r--r--meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8/gcc-4.8-PR57909.patch26
2 files changed, 29 insertions, 2 deletions
diff --git a/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8.inc b/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8.inc
index 8f3fbd73..802b3a67 100644
--- a/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8.inc
+++ b/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8.inc
@@ -46,8 +46,9 @@ SRC_URI = "http://cbuild.validation.linaro.org/snapshots/gcc-${PV}-${RELEASE}.ta
file://0034-Use-the-multilib-config-files-from-B-instead-of-usin.patch \
file://0035-wcast-qual-PR-55383.patch \
file://gcc-4.8-PR56797.patch \
- file://use-lib-for-aarch64.patch \
- file://fix-g++-sysroot.patch \
+ file://gcc-4.8-PR57909.patch \
+ file://use-lib-for-aarch64.patch \
+ file://fix-g++-sysroot.patch \
"
SRC_URI[md5sum] = "a4e424ab2293475242d1242610a2eac5"
diff --git a/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8/gcc-4.8-PR57909.patch b/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8/gcc-4.8-PR57909.patch
new file mode 100644
index 00000000..52121655
--- /dev/null
+++ b/meta-linaro-toolchain/recipes-devtools/gcc/gcc-linaro-4.8/gcc-4.8-PR57909.patch
@@ -0,0 +1,26 @@
+Author: Yvan Roux <yvan.roux@linaro.org>
+Description: Fix PR target/57909.
+ * config/arm/arm.c (gen_movmem_ldrd_strd):
+ Fix unaligned load/store usage in HI mode.
+
+--- trunk/gcc/config/arm/arm.c 2013/07/17 11:15:24 201004
++++ trunk/gcc/config/arm/arm.c 2013/07/17 11:39:14 201005
+@@ -12018,8 +12018,16 @@
+ dst = adjust_address (dst, HImode, 0);
+ src = adjust_address (src, HImode, 0);
+ reg0 = gen_reg_rtx (SImode);
+- emit_insn (gen_unaligned_loadhiu (reg0, src));
+- emit_insn (gen_unaligned_storehi (dst, gen_lowpart (HImode, reg0)));
++ if (src_aligned)
++ emit_insn (gen_zero_extendhisi2 (reg0, src));
++ else
++ emit_insn (gen_unaligned_loadhiu (reg0, src));
++
++ if (dst_aligned)
++ emit_insn (gen_movhi (dst, gen_lowpart(HImode, reg0)));
++ else
++ emit_insn (gen_unaligned_storehi (dst, gen_lowpart (HImode, reg0)));
++
+ src = next_consecutive_mem (src);
+ dst = next_consecutive_mem (dst);
+ if (len == 2)